34 US patents granted on 19 August 2008 and assigned to Intel
| 1 | 7,415,732 | Mechanism to prevent counterfeiting in a hardware device |
| 2 | 7,415,708 | Virtual machine management using processor state information |
| 3 | 7,415,701 | Methods and apparatus to support mixed-mode execution within a single instruction set architecture process of a virtual machine |
| 4 | 7,415,658 | Forward error correction mapping and de-mapping techniques |
| 5 | 7,415,656 | Techniques to preserve bandwidth in a communication system |
| 6 | 7,415,633 | Method and apparatus for preventing and recovering from TLB corruption by soft error |
| 7 | 7,415,625 | Policy table rule based processor side bus signaling |
| 8 | 7,415,598 | Message synchronization in network processors |
| 9 | 7,415,577 | Method and apparatus to write back data |
| 10 | 7,415,549 | DMA completion processing mechanism |
| 11 | 7,415,540 | Scheduling processing threads |
| 12 | 7,415,513 | Method, apparatus, system, and article of manufacture for generating a response in an offload adapter |
| 13 | 7,415,262 | Wireless access point power control |
| 14 | 7,415,245 | Pulse shaping signals for ultrawideband communication |
| 15 | 7,415,110 | Method and apparatus for the generation of cryptographic keys |
| 16 | 7,415,032 | Aggregatable connectivity |
| 17 | 7,415,027 | Processing frame bits |
| 18 | 7,415,024 | System and method of annotating network packets |
| 19 | 7,414,991 | Computing system and method to select data packet |
| 20 | 7,414,976 | Method and apparatus to implement operation and maintenance (OAM) functions on a network processor |
| 21 | 7,414,883 | Programming a normally single phase chalcogenide material for use as a memory or FPLA |
| 22 | 7,414,843 | Method and apparatus for a layered thermal management arrangement |
| 23 | 7,414,632 | Multi-pass 4:2:0 subpicture blending |
| 24 | 7,414,624 | Apparatus and method for a frustum culling algorithm suitable for hardware implementation |
| 25 | 7,414,478 | Integrated parallel power amplifier |
| 26 | 7,414,426 | Time multiplexed dynamic on-die termination |
| 27 | 7,414,389 | Low-power battery pack with hall-effect sensor |
| 28 | 7,414,383 | Multi-phase voltage regulator with phases ordered by lowest phase current |
| 29 | 7,414,298 | Super self-aligned collector device for mono-and hetero bipolar junction transistors, and method of making same |
| 30 | 7,414,290 | Double gate transistor, method of manufacturing same, and system containing same |
| 31 | 7,413,995 | Etched interposer for integrated circuit devices |
| 32 | 7,413,936 | Method of forming copper layers |
| 33 | 7,413,586 | In-tool and out-of-tool protection of extreme ultraviolet (EUV) reticles |
| 34 | 7,412,872 | Process for screening outgas emissions in semiconductor processing |
