<?xml version="1.0" encoding="UTF-8"?>
<rss version="2.0"
	xmlns:content="http://purl.org/rss/1.0/modules/content/"
	xmlns:wfw="http://wellformedweb.org/CommentAPI/"
	xmlns:dc="http://purl.org/dc/elements/1.1/"
	xmlns:atom="http://www.w3.org/2005/Atom"
	xmlns:sy="http://purl.org/rss/1.0/modules/syndication/"
	xmlns:slash="http://purl.org/rss/1.0/modules/slash/"
	>

<channel>
	<title>Latest Patents &#187; Intel</title>
	<atom:link href="http://www.latestpatents.com/category/intel/feed/" rel="self" type="application/rss+xml" />
	<link>http://www.latestpatents.com</link>
	<description>Latest Patents of Leading Technology Companies</description>
	<lastBuildDate>Fri, 03 Feb 2012 03:39:47 +0000</lastBuildDate>
	<language>en</language>
	<sy:updatePeriod>hourly</sy:updatePeriod>
	<sy:updateFrequency>1</sy:updateFrequency>
	<generator>http://wordpress.org/?v=3.0.4</generator>
		<item>
		<title>Intel patent applications published on 02 February 2012</title>
		<link>http://www.latestpatents.com/intel-patent-applications-published-on-02-february-2012/</link>
		<comments>http://www.latestpatents.com/intel-patent-applications-published-on-02-february-2012/#comments</comments>
		<pubDate>Fri, 03 Feb 2012 03:34:42 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patent Applications]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=16408</guid>
		<description><![CDATA[4 US patent applications published on 02 February 2012 and assigned to Intel 1 20120030457 OFFLOADING THE PROCESSING OF A NETWORK PROTOCOL STACK 2 20120028655 RADIO COMMUNICATION DEVICES, INFORMATION PROVIDERS, METHODS FOR CONTROLLING A RADIO COMMUNICATION DEVICE AND METHODS FOR CONTROLLING AN INFORMATION PROVIDER 3 20120026921 METHOD FOR THE TRANSMISSION OF DATA FIELD OF TECHNOLOGY [...]]]></description>
			<content:encoded><![CDATA[<p>4 US patent applications published on 02 February 2012 and assigned to Intel<br />
<span id="more-16408"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20120030457.PGNR.&#038;OS=DN/20120030457RS=DN/20120030457" target="_blank">20120030457</a></td>
<td valign="top">OFFLOADING THE PROCESSING OF A NETWORK PROTOCOL STACK</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20120028655.PGNR.&#038;OS=DN/20120028655RS=DN/20120028655" target="_blank">20120028655</a></td>
<td valign="top">RADIO COMMUNICATION DEVICES, INFORMATION PROVIDERS, METHODS FOR CONTROLLING A RADIO COMMUNICATION DEVICE AND METHODS FOR CONTROLLING AN INFORMATION PROVIDER</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20120026921.PGNR.&#038;OS=DN/20120026921RS=DN/20120026921" target="_blank">20120026921</a></td>
<td valign="top">METHOD FOR THE TRANSMISSION OF DATA FIELD OF TECHNOLOGY</td>
</tr>
<tr>
<td valign="top" align="right">4</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20120025999.PGNR.&#038;OS=DN/20120025999RS=DN/20120025999" target="_blank">20120025999</a></td>
<td valign="top">REMOTELY CONFIGURABLE ASSISTED-LIVING NOTIFICATION SYSTEM WITH GRADIENT PROXIMITY SENSITIVITY</td>
</tr>
</table>
]]></content:encoded>
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		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>Intel patents granted on 31 January 2012</title>
		<link>http://www.latestpatents.com/intel-patents-granted-on-31-january-2012/</link>
		<comments>http://www.latestpatents.com/intel-patents-granted-on-31-january-2012/#comments</comments>
		<pubDate>Tue, 31 Jan 2012 21:49:35 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patents]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=16367</guid>
		<description><![CDATA[20 US patents granted on 31 January 2012 and assigned to Intel 1 8,108,897 Method and apparatus for displaying entertainment system data upon selection of a video data display 2 8,108,867 Preserving hardware thread cache affinity via procrastination 3 8,108,863 Load balancing for multi-threaded applications via asymmetric power throttling 4 8,108,856 Method and apparatus for [...]]]></description>
			<content:encoded><![CDATA[<p>20 US patents granted on 31 January 2012 and assigned to Intel<br />
<span id="more-16367"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,897" target="_blank" rel="nofollow">8,108,897</a></td>
<td valign="top">Method and apparatus for displaying entertainment system data upon selection of a video data display</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,867" target="_blank" rel="nofollow">8,108,867</a></td>
<td valign="top">Preserving hardware thread cache affinity via procrastination</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,863" target="_blank" rel="nofollow">8,108,863</a></td>
<td valign="top">Load balancing for multi-threaded applications via asymmetric power throttling</td>
</tr>
<tr>
<td valign="top" align="right">4</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,856" target="_blank" rel="nofollow">8,108,856</a></td>
<td valign="top">Method and apparatus for adaptive integrity measurement of computer software</td>
</tr>
<tr>
<td valign="top" align="right">5</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,776" target="_blank" rel="nofollow">8,108,776</a></td>
<td valign="top">User interface for multimodal information system</td>
</tr>
<tr>
<td valign="top" align="right">6</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,761" target="_blank" rel="nofollow">8,108,761</a></td>
<td valign="top">Optimizing the size of memory devices used for error correction code storage</td>
</tr>
<tr>
<td valign="top" align="right">7</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,756" target="_blank" rel="nofollow">8,108,756</a></td>
<td valign="top">Techniques to perform forward error correction for an electrical backplane</td>
</tr>
<tr>
<td valign="top" align="right">8</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,676" target="_blank" rel="nofollow">8,108,676</a></td>
<td valign="top">Link key injection mechanism for personal area networks</td>
</tr>
<tr>
<td valign="top" align="right">9</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,670" target="_blank" rel="nofollow">8,108,670</a></td>
<td valign="top">Client apparatus and method with key manager</td>
</tr>
<tr>
<td valign="top" align="right">10</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,668" target="_blank" rel="nofollow">8,108,668</a></td>
<td valign="top">Associating a multi-context trusted platform module with distributed platforms</td>
</tr>
<tr>
<td valign="top" align="right">11</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,665" target="_blank" rel="nofollow">8,108,665</a></td>
<td valign="top">Decoupled hardware configuration manager</td>
</tr>
<tr>
<td valign="top" align="right">12</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,627" target="_blank" rel="nofollow">8,108,627</a></td>
<td valign="top">Array comparison and swap operations</td>
</tr>
<tr>
<td valign="top" align="right">13</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,584" target="_blank" rel="nofollow">8,108,584</a></td>
<td valign="top">Use of completer knowledge of memory region ordering requirements to modify transaction attributes</td>
</tr>
<tr>
<td valign="top" align="right">14</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,542" target="_blank" rel="nofollow">8,108,542</a></td>
<td valign="top">Method and apparatus to determine broadcast content and scheduling in a broadcast system</td>
</tr>
<tr>
<td valign="top" align="right">15</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,108,324" target="_blank" rel="nofollow">8,108,324</a></td>
<td valign="top">Forward feature selection for support vector machines</td>
</tr>
<tr>
<td valign="top" align="right">16</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,107,879" target="_blank" rel="nofollow">8,107,879</a></td>
<td valign="top">Device, system, and method of establishing multiple wireless connections</td>
</tr>
<tr>
<td valign="top" align="right">17</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,107,510" target="_blank" rel="nofollow">8,107,510</a></td>
<td valign="top">Method and apparatus for non-cooperative coexistence between wireless communication protocols</td>
</tr>
<tr>
<td valign="top" align="right">18</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,106,440" target="_blank" rel="nofollow">8,106,440</a></td>
<td valign="top">Selective high-k dielectric film deposition for semiconductor device</td>
</tr>
<tr>
<td valign="top" align="right">19</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,105,848" target="_blank" rel="nofollow">8,105,848</a></td>
<td valign="top">Programmable electromagnetic array for molecule transport</td>
</tr>
<tr>
<td valign="top" align="right">20</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,104,172" target="_blank" rel="nofollow">8,104,172</a></td>
<td valign="top">Method buffer coating having a physical mixture of high toughness polymer and a low shrinkage polymer</td>
</tr>
</table>
]]></content:encoded>
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		</item>
		<item>
		<title>Intel patent applications published on 26 January 2012</title>
		<link>http://www.latestpatents.com/intel-patent-applications-published-on-26-january-2012/</link>
		<comments>http://www.latestpatents.com/intel-patent-applications-published-on-26-january-2012/#comments</comments>
		<pubDate>Fri, 27 Jan 2012 00:05:48 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patent Applications]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=16326</guid>
		<description><![CDATA[3 US patent applications published on 26 January 2012 and assigned to Intel 1 20120023502 ESTABLISHING THREAD PRIORITY IN A PROCESSOR OR THE LIKE 2 20120020340 SYSTEM AND METHOD FOR TRANSFERRING WIRELESS NETWORK ACCESS PASSWORDS 3 20120019285 METHOD AND APPARATUS FOR FAST WAKE-UP OF ANALOG BIASES]]></description>
			<content:encoded><![CDATA[<p>3 US patent applications published on 26 January 2012 and assigned to Intel<br />
<span id="more-16326"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20120023502.PGNR.&#038;OS=DN/20120023502RS=DN/20120023502" target="_blank">20120023502</a></td>
<td valign="top">ESTABLISHING THREAD PRIORITY IN A PROCESSOR OR THE LIKE</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20120020340.PGNR.&#038;OS=DN/20120020340RS=DN/20120020340" target="_blank">20120020340</a></td>
<td valign="top">SYSTEM AND METHOD FOR TRANSFERRING WIRELESS NETWORK ACCESS PASSWORDS</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20120019285.PGNR.&#038;OS=DN/20120019285RS=DN/20120019285" target="_blank">20120019285</a></td>
<td valign="top">METHOD AND APPARATUS FOR FAST WAKE-UP OF ANALOG BIASES</td>
</tr>
</table>
]]></content:encoded>
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		</item>
		<item>
		<title>Intel patents granted on 24 January 2012</title>
		<link>http://www.latestpatents.com/intel-patents-granted-on-24-january-2012/</link>
		<comments>http://www.latestpatents.com/intel-patents-granted-on-24-january-2012/#comments</comments>
		<pubDate>Tue, 24 Jan 2012 15:35:51 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patents]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=16286</guid>
		<description><![CDATA[14 US patents granted on 24 January 2012 and assigned to Intel 1 8,103,908 Method and system for recovery of a computing environment during pre-boot and runtime phases 2 8,103,883 Method and apparatus for enforcing use of danbury key management services for software applied full volume encryption 3 8,103,858 Efficient parallel floating point exception handling [...]]]></description>
			<content:encoded><![CDATA[<p>14 US patents granted on 24 January 2012 and assigned to Intel<br />
<span id="more-16286"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,103,908" target="_blank" rel="nofollow">8,103,908</a></td>
<td valign="top">Method and system for recovery of a computing environment during pre-boot and runtime phases</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,103,883" target="_blank" rel="nofollow">8,103,883</a></td>
<td valign="top">Method and apparatus for enforcing use of danbury key management services for software applied full volume encryption</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,103,858" target="_blank" rel="nofollow">8,103,858</a></td>
<td valign="top">Efficient parallel floating point exception handling in a processor</td>
</tr>
<tr>
<td valign="top" align="right">4</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,103,831" target="_blank" rel="nofollow">8,103,831</a></td>
<td valign="top">Efficient method and apparatus for employing a micro-op cache in a processor</td>
</tr>
<tr>
<td valign="top" align="right">5</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,103,830" target="_blank" rel="nofollow">8,103,830</a></td>
<td valign="top">Disabling cache portions during low voltage operations</td>
</tr>
<tr>
<td valign="top" align="right">6</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,103,816" target="_blank" rel="nofollow">8,103,816</a></td>
<td valign="top">Technique for communicating interrupts in a computer system</td>
</tr>
<tr>
<td valign="top" align="right">7</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,103,218" target="_blank" rel="nofollow">8,103,218</a></td>
<td valign="top">Method and apparatus for scheduling transmissions in a wireless communication system</td>
</tr>
<tr>
<td valign="top" align="right">8</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,102,960" target="_blank" rel="nofollow">8,102,960</a></td>
<td valign="top">Adaptation of a digital receiver</td>
</tr>
<tr>
<td valign="top" align="right">9</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,102,901" target="_blank" rel="nofollow">8,102,901</a></td>
<td valign="top">Techniques to manage wireless connections</td>
</tr>
<tr>
<td valign="top" align="right">10</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,102,712" target="_blank" rel="nofollow">8,102,712</a></td>
<td valign="top">NAND programming technique</td>
</tr>
<tr>
<td valign="top" align="right">11</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,102,414" target="_blank" rel="nofollow">8,102,414</a></td>
<td valign="top">Obtaining consumer electronic device state information</td>
</tr>
<tr>
<td valign="top" align="right">12</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,101,485" target="_blank" rel="nofollow">8,101,485</a></td>
<td valign="top">Replacement gates to enhance transistor strain</td>
</tr>
<tr>
<td valign="top" align="right">13</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,101,471" target="_blank" rel="nofollow">8,101,471</a></td>
<td valign="top">Method of forming programmable anti-fuse element</td>
</tr>
<tr>
<td valign="top" align="right">14</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,100,314" target="_blank" rel="nofollow">8,100,314</a></td>
<td valign="top">Carbon nanotubes solder composite for high performance interconnect</td>
</tr>
</table>
]]></content:encoded>
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		<item>
		<title>Intel patent applications published on 19 January 2012</title>
		<link>http://www.latestpatents.com/intel-patent-applications-published-on-19-january-2012/</link>
		<comments>http://www.latestpatents.com/intel-patent-applications-published-on-19-january-2012/#comments</comments>
		<pubDate>Thu, 19 Jan 2012 16:49:39 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patent Applications]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=16245</guid>
		<description><![CDATA[1 US patent application published on 19 January 2012 and assigned to Intel 1 20120013762 DETERMINING A FINAL EXPOSURE SETTING AUTOMATICALLY FOR A SOLID STATE CAMERA WITHOUT A SEPARATE LIGHT METERING CIRCUIT]]></description>
			<content:encoded><![CDATA[<p>1 US patent application published on 19 January 2012 and assigned to Intel<br />
<span id="more-16245"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20120013762.PGNR.&#038;OS=DN/20120013762RS=DN/20120013762" target="_blank">20120013762</a></td>
<td valign="top">DETERMINING A FINAL EXPOSURE SETTING AUTOMATICALLY FOR A SOLID STATE CAMERA WITHOUT A SEPARATE LIGHT METERING CIRCUIT</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patents granted on 17 January 2012</title>
		<link>http://www.latestpatents.com/intel-patents-granted-on-17-january-2012/</link>
		<comments>http://www.latestpatents.com/intel-patents-granted-on-17-january-2012/#comments</comments>
		<pubDate>Wed, 18 Jan 2012 00:39:31 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patents]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=16205</guid>
		<description><![CDATA[27 US patents granted on 17 January 2012 and assigned to Intel 1 8,099,786 Embedded mechanism for platform vulnerability assessment 2 8,099,730 Heterogeneous virtualization of host and guest OS having different register sizes using translation layer to extract device port numbers for host OS system memory addresses 3 8,099,718 Method and system for whitelisting software [...]]]></description>
			<content:encoded><![CDATA[<p>27 US patents granted on 17 January 2012 and assigned to Intel<br />
<span id="more-16205"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,786" target="_blank" rel="nofollow">8,099,786</a></td>
<td valign="top">Embedded mechanism for platform vulnerability assessment</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,730" target="_blank" rel="nofollow">8,099,730</a></td>
<td valign="top">Heterogeneous virtualization of host and guest OS having different register sizes using translation layer to extract device port numbers for host OS system memory addresses</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,718" target="_blank" rel="nofollow">8,099,718</a></td>
<td valign="top">Method and system for whitelisting software components</td>
</tr>
<tr>
<td valign="top" align="right">4</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,687" target="_blank" rel="nofollow">8,099,687</a></td>
<td valign="top">Interchangeable connection arrays for double-sided DIMM placement</td>
</tr>
<tr>
<td valign="top" align="right">5</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,619" target="_blank" rel="nofollow">8,099,619</a></td>
<td valign="top">Voltage regulator with drive override</td>
</tr>
<tr>
<td valign="top" align="right">6</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,587" target="_blank" rel="nofollow">8,099,587</a></td>
<td valign="top">Compressing and accessing a microcode ROM</td>
</tr>
<tr>
<td valign="top" align="right">7</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,581" target="_blank" rel="nofollow">8,099,581</a></td>
<td valign="top">Synchronizing a translation lookaside buffer with an extended paging table</td>
</tr>
<tr>
<td valign="top" align="right">8</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,574" target="_blank" rel="nofollow">8,099,574</a></td>
<td valign="top">Providing protected access to critical memory regions</td>
</tr>
<tr>
<td valign="top" align="right">9</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,538" target="_blank" rel="nofollow">8,099,538</a></td>
<td valign="top">Increasing functionality of a reader-writer lock</td>
</tr>
<tr>
<td valign="top" align="right">10</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,523" target="_blank" rel="nofollow">8,099,523</a></td>
<td valign="top">PCI express enhancements and extensions including transactions having prefetch parameters</td>
</tr>
<tr>
<td valign="top" align="right">11</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,495" target="_blank" rel="nofollow">8,099,495</a></td>
<td valign="top">Method, apparatus and system for platform identity binding in a network node</td>
</tr>
<tr>
<td valign="top" align="right">12</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,479" target="_blank" rel="nofollow">8,099,479</a></td>
<td valign="top">Distributed mesh network</td>
</tr>
<tr>
<td valign="top" align="right">13</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,471" target="_blank" rel="nofollow">8,099,471</a></td>
<td valign="top">Method and system for communicating between memory regions</td>
</tr>
<tr>
<td valign="top" align="right">14</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,099,119" target="_blank" rel="nofollow">8,099,119</a></td>
<td valign="top">Hybrid, multiple channel, and two-step channel quality indicator (CQI) feedback schemes</td>
</tr>
<tr>
<td valign="top" align="right">15</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,098,999" target="_blank" rel="nofollow">8,098,999</a></td>
<td valign="top">Multiple channel power monitor</td>
</tr>
<tr>
<td valign="top" align="right">16</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,098,817" target="_blank" rel="nofollow">8,098,817</a></td>
<td valign="top">Methods and apparatus for mixing encrypted data with unencrypted data</td>
</tr>
<tr>
<td valign="top" align="right">17</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,098,783" target="_blank" rel="nofollow">8,098,783</a></td>
<td valign="top">Training pattern for a biased clock recovery tracking loop</td>
</tr>
<tr>
<td valign="top" align="right">18</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,098,726" target="_blank" rel="nofollow">8,098,726</a></td>
<td valign="top">Subranging for a pulse position and pulse width modulation based transmitter</td>
</tr>
<tr>
<td valign="top" align="right">19</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,098,689" target="_blank" rel="nofollow">8,098,689</a></td>
<td valign="top">Systems and methods for frame tunnelling in wireless communications</td>
</tr>
<tr>
<td valign="top" align="right">20</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,098,676" target="_blank" rel="nofollow">8,098,676</a></td>
<td valign="top">Techniques to utilize queues for network interface devices</td>
</tr>
<tr>
<td valign="top" align="right">21</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,098,669" target="_blank" rel="nofollow">8,098,669</a></td>
<td valign="top">Method and apparatus for signaling virtual channel support in communication networks</td>
</tr>
<tr>
<td valign="top" align="right">22</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,098,640" target="_blank" rel="nofollow">8,098,640</a></td>
<td valign="top">Systems and methods for determining a predictable modulation and coding scheme</td>
</tr>
<tr>
<td valign="top" align="right">23</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,098,603" target="_blank" rel="nofollow">8,098,603</a></td>
<td valign="top">Bandwidth adaptation in a wireless network</td>
</tr>
<tr>
<td valign="top" align="right">24</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,098,046" target="_blank" rel="nofollow">8,098,046</a></td>
<td valign="top">Battery charging apparatus having a chute and method of recharging a battery</td>
</tr>
<tr>
<td valign="top" align="right">25</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,097,911" target="_blank" rel="nofollow">8,097,911</a></td>
<td valign="top">Etch stop structures for floating gate devices</td>
</tr>
<tr>
<td valign="top" align="right">26</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,097,421" target="_blank" rel="nofollow">8,097,421</a></td>
<td valign="top">Method for performing a multiplex immunoassay using label disassociation and an integrated substrate</td>
</tr>
<tr>
<td valign="top" align="right">27</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,096,707" target="_blank" rel="nofollow">8,096,707</a></td>
<td valign="top">Thermal sensor device</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patent applications published on 12 January 2012</title>
		<link>http://www.latestpatents.com/intel-patent-applications-published-on-12-january-2012/</link>
		<comments>http://www.latestpatents.com/intel-patent-applications-published-on-12-january-2012/#comments</comments>
		<pubDate>Thu, 12 Jan 2012 22:13:29 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patent Applications]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=16164</guid>
		<description><![CDATA[1 US patent application published on 12 January 2012 and assigned to Intel 1 20120008721 COMMUNICATION TERMINAL, METHOD FOR RECEIVING DATA AND COMPUTER PROGRAM PRODUCT]]></description>
			<content:encoded><![CDATA[<p>1 US patent application published on 12 January 2012 and assigned to Intel<br />
<span id="more-16164"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20120008721.PGNR.&#038;OS=DN/20120008721RS=DN/20120008721" target="_blank">20120008721</a></td>
<td valign="top">COMMUNICATION TERMINAL, METHOD FOR RECEIVING DATA AND COMPUTER PROGRAM PRODUCT</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patents granted on 10 January 2012</title>
		<link>http://www.latestpatents.com/intel-patents-granted-on-10-january-2012/</link>
		<comments>http://www.latestpatents.com/intel-patents-granted-on-10-january-2012/#comments</comments>
		<pubDate>Tue, 10 Jan 2012 23:59:29 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patents]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=16124</guid>
		<description><![CDATA[23 US patents granted on 10 January 2012 and assigned to Intel 1 8,095,932 Providing quality of service via thread priority in a hyper-threaded microprocessor 2 8,095,920 Post-pass binary adaptation for software-based speculative precomputation 3 8,095,824 Performing mode switching in an unbounded transactional memory (UTM) system 4 8,095,725 Device, system, and method of memory allocation [...]]]></description>
			<content:encoded><![CDATA[<p>23 US patents granted on 10 January 2012 and assigned to Intel<br />
<span id="more-16124"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,095,932" target="_blank" rel="nofollow">8,095,932</a></td>
<td valign="top">Providing quality of service via thread priority in a hyper-threaded microprocessor</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,095,920" target="_blank" rel="nofollow">8,095,920</a></td>
<td valign="top">Post-pass binary adaptation for software-based speculative precomputation</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,095,824" target="_blank" rel="nofollow">8,095,824</a></td>
<td valign="top">Performing mode switching in an unbounded transactional memory (UTM) system</td>
</tr>
<tr>
<td valign="top" align="right">4</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,095,725" target="_blank" rel="nofollow">8,095,725</a></td>
<td valign="top">Device, system, and method of memory allocation</td>
</tr>
<tr>
<td valign="top" align="right">5</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,095,586" target="_blank" rel="nofollow">8,095,586</a></td>
<td valign="top">Methods and arrangements to correct for double rounding errors when rounding floating point numbers to nearest away</td>
</tr>
<tr>
<td valign="top" align="right">6</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,095,549" target="_blank" rel="nofollow">8,095,549</a></td>
<td valign="top">Searching for strings in messages</td>
</tr>
<tr>
<td valign="top" align="right">7</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,095,176" target="_blank" rel="nofollow">8,095,176</a></td>
<td valign="top">Method and apparatus of subchannelization of wireless communication system</td>
</tr>
<tr>
<td valign="top" align="right">8</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,095,173" target="_blank" rel="nofollow">8,095,173</a></td>
<td valign="top">Wireless communication device with physical-layer reconfigurable processing engines</td>
</tr>
<tr>
<td valign="top" align="right">9</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,095,069" target="_blank" rel="nofollow">8,095,069</a></td>
<td valign="top">Techniques for MMWAVE WPAN communications with high-directional steerable antennas combining omni-directional transmissions with beamforming training</td>
</tr>
<tr>
<td valign="top" align="right">10</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,094,723" target="_blank" rel="nofollow">8,094,723</a></td>
<td valign="top">Motion estimation sum of all differences (SAD) array having reduced semiconductor die area consumption</td>
</tr>
<tr>
<td valign="top" align="right">11</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,094,662" target="_blank" rel="nofollow">8,094,662</a></td>
<td valign="top">Methods and apparatus to limit transmission of data to a localized area</td>
</tr>
<tr>
<td valign="top" align="right">12</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,094,651" target="_blank" rel="nofollow">8,094,651</a></td>
<td valign="top">Emergency call services for wireless network roaming</td>
</tr>
<tr>
<td valign="top" align="right">13</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,094,633" target="_blank" rel="nofollow">8,094,633</a></td>
<td valign="top">Adaptive paging area</td>
</tr>
<tr>
<td valign="top" align="right">14</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,094,616" target="_blank" rel="nofollow">8,094,616</a></td>
<td valign="top">OFDMA contention-based random access channel design for mobile wireless systems</td>
</tr>
<tr>
<td valign="top" align="right">15</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,094,612" target="_blank" rel="nofollow">8,094,612</a></td>
<td valign="top">Quality of service resource negotiation</td>
</tr>
<tr>
<td valign="top" align="right">16</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,094,505" target="_blank" rel="nofollow">8,094,505</a></td>
<td valign="top">Method and system to lower the minimum operating voltage of a memory array</td>
</tr>
<tr>
<td valign="top" align="right">17</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,094,459" target="_blank" rel="nofollow">8,094,459</a></td>
<td valign="top">Microelectronic substrate including embedded components and spacer layer and method of forming same</td>
</tr>
<tr>
<td valign="top" align="right">18</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,094,212" target="_blank" rel="nofollow">8,094,212</a></td>
<td valign="top">Audio-based attention grabber for imaging devices</td>
</tr>
<tr>
<td valign="top" align="right">19</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,093,717" target="_blank" rel="nofollow">8,093,717</a></td>
<td valign="top">Microstrip spacer for stacked chip scale packages, methods of making same, methods of operating same, and systems containing same</td>
</tr>
<tr>
<td valign="top" align="right">20</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,093,704" target="_blank" rel="nofollow">8,093,704</a></td>
<td valign="top">Package on package using a bump-less build up layer (BBUL) package</td>
</tr>
<tr>
<td valign="top" align="right">21</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,093,667" target="_blank" rel="nofollow">8,093,667</a></td>
<td valign="top">Flexible gate electrode device for bio-sensing</td>
</tr>
<tr>
<td valign="top" align="right">22</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,093,584" target="_blank" rel="nofollow">8,093,584</a></td>
<td valign="top">Self-aligned replacement metal gate process for QWFET devices</td>
</tr>
<tr>
<td valign="top" align="right">23</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,093,105" target="_blank" rel="nofollow">8,093,105</a></td>
<td valign="top">Method of fabricating a capillary-flow underfill compositions</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patent applications published on 05 January 2012</title>
		<link>http://www.latestpatents.com/intel-patent-applications-published-on-05-january-2012/</link>
		<comments>http://www.latestpatents.com/intel-patent-applications-published-on-05-january-2012/#comments</comments>
		<pubDate>Thu, 05 Jan 2012 18:49:37 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patent Applications]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=16084</guid>
		<description><![CDATA[3 US patent applications published on 05 January 2012 and assigned to Intel 1 20120004013 METHOD FOR RECEIVING SYNCHRONIZATION SIGNALS OF A MOBILE RADIO NETWORK AND TRANSMITTING/RECEIVING DEVICE FOR MOBILE RADIO SIGNALS 2 20120002952 CONTENT SYNCHRONIZATION TECHNIQUES 3 20120000640 METHOD AND AN APPARATUS FOR COOLING A COMPUTER]]></description>
			<content:encoded><![CDATA[<p>3 US patent applications published on 05 January 2012 and assigned to Intel<br />
<span id="more-16084"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20120004013.PGNR.&#038;OS=DN/20120004013RS=DN/20120004013" target="_blank">20120004013</a></td>
<td valign="top"> METHOD FOR RECEIVING SYNCHRONIZATION SIGNALS OF A MOBILE RADIO NETWORK AND TRANSMITTING/RECEIVING DEVICE FOR MOBILE RADIO SIGNALS</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20120002952.PGNR.&#038;OS=DN/20120002952RS=DN/20120002952" target="_blank">20120002952</a></td>
<td valign="top">CONTENT SYNCHRONIZATION TECHNIQUES</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20120000640.PGNR.&#038;OS=DN/20120000640RS=DN/20120000640" target="_blank">20120000640</a></td>
<td valign="top">METHOD AND AN APPARATUS FOR COOLING A COMPUTER</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patents granted on 03 January 2012</title>
		<link>http://www.latestpatents.com/intel-patents-granted-on-03-january-2012/</link>
		<comments>http://www.latestpatents.com/intel-patents-granted-on-03-january-2012/#comments</comments>
		<pubDate>Tue, 03 Jan 2012 13:52:35 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patents]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=16044</guid>
		<description><![CDATA[16 US patents granted on 03 January 2012 and assigned to Intel 1 8,091,123 Method and apparatus for secured embedded device communication 2 8,091,004 Inter-packet selective symbol mapping in a joint incremental redundancy and symbol mapping diversity system 3 8,091,000 Disabling portions of memory with defects 4 8,090,996 Detecting soft errors via selective re-execution 5 [...]]]></description>
			<content:encoded><![CDATA[<p>16 US patents granted on 03 January 2012 and assigned to Intel<br />
<span id="more-16044"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,091,123" target="_blank" rel="nofollow">8,091,123</a></td>
<td valign="top">Method and apparatus for secured embedded device communication</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,091,004" target="_blank" rel="nofollow">8,091,004</a></td>
<td valign="top">Inter-packet selective symbol mapping in a joint incremental redundancy and symbol mapping diversity system</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,091,000" target="_blank" rel="nofollow">8,091,000</a></td>
<td valign="top">Disabling portions of memory with defects</td>
</tr>
<tr>
<td valign="top" align="right">4</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,090,996" target="_blank" rel="nofollow">8,090,996</a></td>
<td valign="top">Detecting soft errors via selective re-execution</td>
</tr>
<tr>
<td valign="top" align="right">5</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,090,977" target="_blank" rel="nofollow">8,090,977</a></td>
<td valign="top">Performing redundant memory hopping</td>
</tr>
<tr>
<td valign="top" align="right">6</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,090,967" target="_blank" rel="nofollow">8,090,967</a></td>
<td valign="top">Power state transition initiation control of memory interconnect based on early warning signal, memory response time, and wakeup delay</td>
</tr>
<tr>
<td valign="top" align="right">7</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,090,919" target="_blank" rel="nofollow">8,090,919</a></td>
<td valign="top">System and method for high performance secure access to a trusted platform module on a hardware virtualization platform</td>
</tr>
<tr>
<td valign="top" align="right">8</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,090,859" target="_blank" rel="nofollow">8,090,859</a></td>
<td valign="top">Decoupling TCP/IP processing in system area networks with call filtering</td>
</tr>
<tr>
<td valign="top" align="right">9</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,090,052" target="_blank" rel="nofollow">8,090,052</a></td>
<td valign="top">Systems and methods for digital delayed array transmitter architecture with beam steering capability for high data rate</td>
</tr>
<tr>
<td valign="top" align="right">10</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,089,947" target="_blank" rel="nofollow">8,089,947</a></td>
<td valign="top">Spatial reuse in directional antenna systems</td>
</tr>
<tr>
<td valign="top" align="right">11</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,089,925" target="_blank" rel="nofollow">8,089,925</a></td>
<td valign="top">Radio communications system with a minimal broadcast channel</td>
</tr>
<tr>
<td valign="top" align="right">12</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,089,788" target="_blank" rel="nofollow">8,089,788</a></td>
<td valign="top">Switched capacitor voltage regulator having multiple conversion ratios</td>
</tr>
<tr>
<td valign="top" align="right">13</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,089,418" target="_blank" rel="nofollow">8,089,418</a></td>
<td valign="top">Antenna structure</td>
</tr>
<tr>
<td valign="top" align="right">14</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,088,665" target="_blank" rel="nofollow">8,088,665</a></td>
<td valign="top">Method of forming self-aligned low resistance contact layer</td>
</tr>
<tr>
<td valign="top" align="right">15</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,088,628" target="_blank" rel="nofollow">8,088,628</a></td>
<td valign="top">Stimulated and coherent anti-stokes raman spectroscopic methods for the detection of molecules</td>
</tr>
<tr>
<td valign="top" align="right">16</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,088,282" target="_blank" rel="nofollow">8,088,282</a></td>
<td valign="top">Sieving media from planar arrays of nanoscale grooves, method of making and method of using the same</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patent applications published on 29 December 2011</title>
		<link>http://www.latestpatents.com/intel-patent-applications-published-on-29-december-2011/</link>
		<comments>http://www.latestpatents.com/intel-patent-applications-published-on-29-december-2011/#comments</comments>
		<pubDate>Thu, 29 Dec 2011 22:19:21 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patent Applications]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=16002</guid>
		<description><![CDATA[3 US patent applications published on 29 December 2011 and assigned to Intel 1 20110321065 Methods and Systems to Implement a Physical Device to Differentiate Amongst Multiple Virtual Machines of a Host Computer System 2 20110321042 Methods and Systems to Permit Multiple Virtual Machines to Separately Configure and Access a Physical Device 3 20110320624 GENERIC [...]]]></description>
			<content:encoded><![CDATA[<p>3 US patent applications published on 29 December 2011 and assigned to Intel<br />
<span id="more-16002"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110321065.PGNR.&#038;OS=DN/20110321065RS=DN/20110321065" target="_blank">20110321065</a></td>
<td valign="top">Methods and Systems to Implement a Physical Device to Differentiate Amongst Multiple Virtual Machines of a Host Computer System</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110321042.PGNR.&#038;OS=DN/20110321042RS=DN/20110321042" target="_blank">20110321042</a></td>
<td valign="top">Methods and Systems to Permit Multiple Virtual Machines to Separately Configure and Access a Physical Device</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110320624.PGNR.&#038;OS=DN/20110320624RS=DN/20110320624" target="_blank">20110320624</a></td>
<td valign="top">GENERIC OBJECT EXCHANGE PROFILE MESSAGE</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patents granted on 27 December 2011</title>
		<link>http://www.latestpatents.com/intel-patents-granted-on-27-december-2011/</link>
		<comments>http://www.latestpatents.com/intel-patents-granted-on-27-december-2011/#comments</comments>
		<pubDate>Tue, 27 Dec 2011 15:30:04 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patents]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=15962</guid>
		<description><![CDATA[25 US patents granted on 27 December 2011 and assigned to Intel 1 8,087,024 Multiple multi-threaded processors having an L1 instruction cache and a shared L2 instruction cache 2 8,087,018 Managing and supporting multithreaded resources for native code in a heterogeneous managed runtime environment 3 8,086,879 Powering on devices via intermediate computing device 4 8,086,839 [...]]]></description>
			<content:encoded><![CDATA[<p>25 US patents granted on 27 December 2011 and assigned to Intel<br />
<span id="more-15962"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,087,024" target="_blank" rel="nofollow">8,087,024</a></td>
<td valign="top">Multiple multi-threaded processors having an L1 instruction cache and a shared L2 instruction cache</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,087,018" target="_blank" rel="nofollow">8,087,018</a></td>
<td valign="top">Managing and supporting multithreaded resources for native code in a heterogeneous managed runtime environment</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,086,879" target="_blank" rel="nofollow">8,086,879</a></td>
<td valign="top">Powering on devices via intermediate computing device</td>
</tr>
<tr>
<td valign="top" align="right">4</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,086,839" target="_blank" rel="nofollow">8,086,839</a></td>
<td valign="top">Authentication for resume boot path</td>
</tr>
<tr>
<td valign="top" align="right">5</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,086,837" target="_blank" rel="nofollow">8,086,837</a></td>
<td valign="top">Method and apparatus to store initialization and configuration information</td>
</tr>
<tr>
<td valign="top" align="right">6</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,086,833" target="_blank" rel="nofollow">8,086,833</a></td>
<td valign="top">Method and system for linking firmware modules in a pre-memory execution environment</td>
</tr>
<tr>
<td valign="top" align="right">7</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,086,827" target="_blank" rel="nofollow">8,086,827</a></td>
<td valign="top">Mechanism for irrevocable transactions</td>
</tr>
<tr>
<td valign="top" align="right">8</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,086,718" target="_blank" rel="nofollow">8,086,718</a></td>
<td valign="top">Automated process and apparatus for providing integrated management and control of computer networks</td>
</tr>
<tr>
<td valign="top" align="right">9</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,086,707" target="_blank" rel="nofollow">8,086,707</a></td>
<td valign="top">Systems and methods for grid agent management</td>
</tr>
<tr>
<td valign="top" align="right">10</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,086,110" target="_blank" rel="nofollow">8,086,110</a></td>
<td valign="top">Optical wavelength division multiplexing (WDM) system including adaptive cross-talk cancellation</td>
</tr>
<tr>
<td valign="top" align="right">11</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,085,859" target="_blank" rel="nofollow">8,085,859</a></td>
<td valign="top">Platform noise mitigation</td>
</tr>
<tr>
<td valign="top" align="right">12</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,085,803" target="_blank" rel="nofollow">8,085,803</a></td>
<td valign="top">Method and apparatus for improving quality of service for packetized voice</td>
</tr>
<tr>
<td valign="top" align="right">13</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,085,772" target="_blank" rel="nofollow">8,085,772</a></td>
<td valign="top">Packet forwarding</td>
</tr>
<tr>
<td valign="top" align="right">14</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,085,769" target="_blank" rel="nofollow">8,085,769</a></td>
<td valign="top">Scaling egress network traffic</td>
</tr>
<tr>
<td valign="top" align="right">15</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,085,765" target="_blank" rel="nofollow">8,085,765</a></td>
<td valign="top">Distributed exterior gateway protocol</td>
</tr>
<tr>
<td valign="top" align="right">16</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,085,737" target="_blank" rel="nofollow">8,085,737</a></td>
<td valign="top">Multi-transceiver mobile communication device and methods for negative scheduling</td>
</tr>
<tr>
<td valign="top" align="right">17</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,085,695" target="_blank" rel="nofollow">8,085,695</a></td>
<td valign="top">Bootstrapping devices using automatic configuration services</td>
</tr>
<tr>
<td valign="top" align="right">18</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,085,653" target="_blank" rel="nofollow">8,085,653</a></td>
<td valign="top">Beamforming with nulling techniques for wireless communications networks</td>
</tr>
<tr>
<td valign="top" align="right">19</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,085,535" target="_blank" rel="nofollow">8,085,535</a></td>
<td valign="top">Fan casing integrated heat spreader for active cooling of computing system skins</td>
</tr>
<tr>
<td valign="top" align="right">20</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,085,190" target="_blank" rel="nofollow">8,085,190</a></td>
<td valign="top">Method and apparatus for faster global positioning system (GPS) location using a pre-computed spatial location for tracking GPS satellites</td>
</tr>
<tr>
<td valign="top" align="right">21</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,084,867" target="_blank" rel="nofollow">8,084,867</a></td>
<td valign="top">Apparatus, system, and method for wireless connection in integrated circuit packages</td>
</tr>
<tr>
<td valign="top" align="right">22</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,084,856" target="_blank" rel="nofollow">8,084,856</a></td>
<td valign="top">Thermal spacer for stacked die package thermal management</td>
</tr>
<tr>
<td valign="top" align="right">23</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,084,818" target="_blank" rel="nofollow">8,084,818</a></td>
<td valign="top">High mobility tri-gate devices and methods of fabrication</td>
</tr>
<tr>
<td valign="top" align="right">24</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,084,282" target="_blank" rel="nofollow">8,084,282</a></td>
<td valign="top">Wafer-level In-P Si bonding for silicon photonic apparatus</td>
</tr>
<tr>
<td valign="top" align="right">25</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,084,202" target="_blank" rel="nofollow">8,084,202</a></td>
<td valign="top">Optical detection for electronic microarrays</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patent applications published on 22 December 2011</title>
		<link>http://www.latestpatents.com/intel-patent-applications-published-on-22-december-2011/</link>
		<comments>http://www.latestpatents.com/intel-patent-applications-published-on-22-december-2011/#comments</comments>
		<pubDate>Fri, 23 Dec 2011 01:59:17 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patent Applications]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=15921</guid>
		<description><![CDATA[1 US patent application published on 22 December 2011 and assigned to Intel 1 20110310909 PACKET SWITCHING]]></description>
			<content:encoded><![CDATA[<p>1 US patent application published on 22 December 2011 and assigned to Intel<br />
<span id="more-15921"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110310909.PGNR.&#038;OS=DN/20110310909RS=DN/20110310909" target="_blank">20110310909</a></td>
<td valign="top">PACKET SWITCHING</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patents granted on 20 December 2011</title>
		<link>http://www.latestpatents.com/intel-patents-granted-on-20-december-2011/</link>
		<comments>http://www.latestpatents.com/intel-patents-granted-on-20-december-2011/#comments</comments>
		<pubDate>Wed, 21 Dec 2011 04:07:43 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patents]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=15877</guid>
		<description><![CDATA[16 US patents granted on 20 December 2011 and assigned to Intel 1 8,082,565 Converged communication server with transaction management 2 8,082,470 Share resources and increase reliability in a server environment 3 8,082,440 Managed data region for server management 4 8,082,431 System and method for increasing platform boot efficiency 5 8,082,430 Representing a plurality of [...]]]></description>
			<content:encoded><![CDATA[<p>16 US patents granted on 20 December 2011 and assigned to Intel<br />
<span id="more-15877"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,082,565" target="_blank" rel="nofollow">8,082,565</a></td>
<td valign="top">Converged communication server with transaction management</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,082,470" target="_blank" rel="nofollow">8,082,470</a></td>
<td valign="top">Share resources and increase reliability in a server environment</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,082,440" target="_blank" rel="nofollow">8,082,440</a></td>
<td valign="top">Managed data region for server management</td>
</tr>
<tr>
<td valign="top" align="right">4</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,082,431" target="_blank" rel="nofollow">8,082,431</a></td>
<td valign="top">System and method for increasing platform boot efficiency</td>
</tr>
<tr>
<td valign="top" align="right">5</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,082,430" target="_blank" rel="nofollow">8,082,430</a></td>
<td valign="top">Representing a plurality of instructions with a fewer number of micro-operations</td>
</tr>
<tr>
<td valign="top" align="right">6</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,082,419" target="_blank" rel="nofollow">8,082,419</a></td>
<td valign="top">Residual addition for video software techniques</td>
</tr>
<tr>
<td valign="top" align="right">7</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,082,418" target="_blank" rel="nofollow">8,082,418</a></td>
<td valign="top">Method and apparatus for coherent device initialization and access</td>
</tr>
<tr>
<td valign="top" align="right">8</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,081,967" target="_blank" rel="nofollow">8,081,967</a></td>
<td valign="top">Method to manage medium access for a mixed wireless network</td>
</tr>
<tr>
<td valign="top" align="right">9</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,081,837" target="_blank" rel="nofollow">8,081,837</a></td>
<td valign="top">Image sensor array leakage and dark current compensation</td>
</tr>
<tr>
<td valign="top" align="right">10</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,081,612" target="_blank" rel="nofollow">8,081,612</a></td>
<td valign="top">Device, system, and method of selectively activating a wireless network connection</td>
</tr>
<tr>
<td valign="top" align="right">11</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,081,506" target="_blank" rel="nofollow">8,081,506</a></td>
<td valign="top">Amorphous semiconductor threshold switch volatile memory cell</td>
</tr>
<tr>
<td valign="top" align="right">12</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,081,489" target="_blank" rel="nofollow">8,081,489</a></td>
<td valign="top">Two piece wire bale independent load mechanism</td>
</tr>
<tr>
<td valign="top" align="right">13</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,081,234" target="_blank" rel="nofollow">8,081,234</a></td>
<td valign="top">Technique for increased exposure range in image sensors</td>
</tr>
<tr>
<td valign="top" align="right">14</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,080,870" target="_blank" rel="nofollow">8,080,870</a></td>
<td valign="top">Die-warpage compensation structures for thinned-die devices, and methods of assembling same</td>
</tr>
<tr>
<td valign="top" align="right">15</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,080,820" target="_blank" rel="nofollow">8,080,820</a></td>
<td valign="top">Apparatus and methods for improving parallel conduction in a quantum well device</td>
</tr>
<tr>
<td valign="top" align="right">16</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,080,475" target="_blank" rel="nofollow">8,080,475</a></td>
<td valign="top">Removal chemistry for selectively etching metal hard mask</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patent applications published on 15 December 2011</title>
		<link>http://www.latestpatents.com/intel-patent-applications-published-on-15-december-2011/</link>
		<comments>http://www.latestpatents.com/intel-patent-applications-published-on-15-december-2011/#comments</comments>
		<pubDate>Fri, 16 Dec 2011 04:39:23 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patent Applications]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=15836</guid>
		<description><![CDATA[6 US patent applications published on 15 December 2011 and assigned to Intel 1 20110307878 SYSTEM FOR ATOMICALLY UPDATING A PLURALITY OF FILES 2 20110307761 MEMORY CELL SUPPLY VOLTAGE CONTROL BASED ON ERROR DETECTION 3 20110305215 METHOD FOR CONTROLLING OPERATION ACTIVITY MODES OF A WIRELESS TELECOMMUNICATIONS TERMINAL 4 20110305198 LTE BASEBAND RECEIVER AND METHOD FOR [...]]]></description>
			<content:encoded><![CDATA[<p>6 US patent applications published on 15 December 2011 and assigned to Intel<br />
<span id="more-15836"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110307878.PGNR.&#038;OS=DN/20110307878RS=DN/20110307878" target="_blank">20110307878</a></td>
<td valign="top">SYSTEM FOR ATOMICALLY UPDATING A PLURALITY OF FILES</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110307761.PGNR.&#038;OS=DN/20110307761RS=DN/20110307761" target="_blank">20110307761</a></td>
<td valign="top">MEMORY CELL SUPPLY VOLTAGE CONTROL BASED ON ERROR DETECTION</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110305215.PGNR.&#038;OS=DN/20110305215RS=DN/20110305215" target="_blank">20110305215</a></td>
<td valign="top">METHOD FOR CONTROLLING OPERATION ACTIVITY MODES OF A WIRELESS TELECOMMUNICATIONS TERMINAL</td>
</tr>
<tr>
<td valign="top" align="right">4</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110305198.PGNR.&#038;OS=DN/20110305198RS=DN/20110305198" target="_blank">20110305198</a></td>
<td valign="top">LTE BASEBAND RECEIVER AND METHOD FOR OPERATING SAME</td>
</tr>
<tr>
<td valign="top" align="right">5</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110305159.PGNR.&#038;OS=DN/20110305159RS=DN/20110305159" target="_blank">20110305159</a></td>
<td valign="top">METHOD FOR CONTROLLING MEASUREMENTS IN A WIRELESS TELECOMMUNICATIONS TERMINAL</td>
</tr>
<tr>
<td valign="top" align="right">6</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110304306.PGNR.&#038;OS=DN/20110304306RS=DN/20110304306" target="_blank">20110304306</a></td>
<td valign="top">CURRENT MODE CONTROL OF VOLTAGE REGULATORS TO MITIGATE OUTPUT VOLTAGE RIPPLE</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patents granted on 13 December 2011</title>
		<link>http://www.latestpatents.com/intel-patents-granted-on-13-december-2011/</link>
		<comments>http://www.latestpatents.com/intel-patents-granted-on-13-december-2011/#comments</comments>
		<pubDate>Wed, 14 Dec 2011 00:14:18 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patents]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=15794</guid>
		<description><![CDATA[33 US patents granted on 13 December 2011 and assigned to Intel 1 8,079,058 Broadcasting and processing multiple data formats 2 8,079,056 Synchronizing a media center on a correct channel 3 8,079,035 Data structure and management techniques for local user-level thread data 4 8,079,034 Optimizing processor-managed resources based on the behavior of a virtual machine [...]]]></description>
			<content:encoded><![CDATA[<p>33 US patents granted on 13 December 2011 and assigned to Intel<br />
<span id="more-15794"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,079,058" target="_blank" rel="nofollow">8,079,058</a></td>
<td valign="top">Broadcasting and processing multiple data formats</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,079,056" target="_blank" rel="nofollow">8,079,056</a></td>
<td valign="top">Synchronizing a media center on a correct channel</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,079,035" target="_blank" rel="nofollow">8,079,035</a></td>
<td valign="top">Data structure and management techniques for local user-level thread data</td>
</tr>
<tr>
<td valign="top" align="right">4</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,079,034" target="_blank" rel="nofollow">8,079,034</a></td>
<td valign="top">Optimizing processor-managed resources based on the behavior of a virtual machine monitor</td>
</tr>
<tr>
<td valign="top" align="right">5</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,079,031" target="_blank" rel="nofollow">8,079,031</a></td>
<td valign="top">Method, apparatus, and a system for dynamically configuring a prefetcher based on a thread specific latency metric</td>
</tr>
<tr>
<td valign="top" align="right">6</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,079,011" target="_blank" rel="nofollow">8,079,011</a></td>
<td valign="top">Printed circuit boards having pads for solder balls and methods for the implementation thereof</td>
</tr>
<tr>
<td valign="top" align="right">7</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,891" target="_blank" rel="nofollow">8,078,891</a></td>
<td valign="top">Method, device, and system for guaranteed minimum processor power state dwell time</td>
</tr>
<tr>
<td valign="top" align="right">8</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,876" target="_blank" rel="nofollow">8,078,876</a></td>
<td valign="top">Apparatus and method for direct anonymous attestation from bilinear maps</td>
</tr>
<tr>
<td valign="top" align="right">9</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,873" target="_blank" rel="nofollow">8,078,873</a></td>
<td valign="top">Two-way authentication between two communication endpoints using a one-way out-of-band (OOB) channel</td>
</tr>
<tr>
<td valign="top" align="right">10</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,862" target="_blank" rel="nofollow">8,078,862</a></td>
<td valign="top">Method for assigning physical data address range in multiprocessor system</td>
</tr>
<tr>
<td valign="top" align="right">11</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,836" target="_blank" rel="nofollow">8,078,836</a></td>
<td valign="top">Vector shuffle instructions operating on multiple lanes each having a plurality of data elements using a common set of per-lane control bits</td>
</tr>
<tr>
<td valign="top" align="right">12</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,831" target="_blank" rel="nofollow">8,078,831</a></td>
<td valign="top">Method and apparatus for affinity-guided speculative helper threads in chip multiprocessors</td>
</tr>
<tr>
<td valign="top" align="right">13</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,824" target="_blank" rel="nofollow">8,078,824</a></td>
<td valign="top">Method for dynamic load balancing on partitioned systems</td>
</tr>
<tr>
<td valign="top" align="right">14</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,807" target="_blank" rel="nofollow">8,078,807</a></td>
<td valign="top">Accelerating software lookups by using buffered or ephemeral stores</td>
</tr>
<tr>
<td valign="top" align="right">15</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,801" target="_blank" rel="nofollow">8,078,801</a></td>
<td valign="top">Obscuring memory access patterns</td>
</tr>
<tr>
<td valign="top" align="right">16</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,743" target="_blank" rel="nofollow">8,078,743</a></td>
<td valign="top">Pipelined processing of RDMA-type network transactions</td>
</tr>
<tr>
<td valign="top" align="right">17</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,662" target="_blank" rel="nofollow">8,078,662</a></td>
<td valign="top">Multiplier product generation based on encoded data from addressable location</td>
</tr>
<tr>
<td valign="top" align="right">18</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,586" target="_blank" rel="nofollow">8,078,586</a></td>
<td valign="top">Accessing file data stored in non-volatile re-programmable semiconductor memories</td>
</tr>
<tr>
<td valign="top" align="right">19</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,216" target="_blank" rel="nofollow">8,078,216</a></td>
<td valign="top">Wireless device content information theft protection system</td>
</tr>
<tr>
<td valign="top" align="right">20</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,212" target="_blank" rel="nofollow">8,078,212</a></td>
<td valign="top">Method and apparatus for allocating power in a MU-MIMO communication system</td>
</tr>
<tr>
<td valign="top" align="right">21</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,185" target="_blank" rel="nofollow">8,078,185</a></td>
<td valign="top">User group-based adaptive soft frequency reuse method to mitigate downlink interference for wireless cellular networks</td>
</tr>
<tr>
<td valign="top" align="right">22</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,078,171" target="_blank" rel="nofollow">8,078,171</a></td>
<td valign="top">Handoff of a mobile station from a first to a second type of wireless network</td>
</tr>
<tr>
<td valign="top" align="right">23</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,077,993" target="_blank" rel="nofollow">8,077,993</a></td>
<td valign="top">Error diffusion-based image processing</td>
</tr>
<tr>
<td valign="top" align="right">24</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,077,802" target="_blank" rel="nofollow">8,077,802</a></td>
<td valign="top">Device, system, and method of resource allocation in a wireless network</td>
</tr>
<tr>
<td valign="top" align="right">25</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,077,796" target="_blank" rel="nofollow">8,077,796</a></td>
<td valign="top">Methods and arrangements for communicating in a multiple input multiple output system</td>
</tr>
<tr>
<td valign="top" align="right">26</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,077,684" target="_blank" rel="nofollow">8,077,684</a></td>
<td valign="top">Personal area network implementation within an infrastructure network</td>
</tr>
<tr>
<td valign="top" align="right">27</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,077,657" target="_blank" rel="nofollow">8,077,657</a></td>
<td valign="top">Keep-alive handling in a wireless network</td>
</tr>
<tr>
<td valign="top" align="right">28</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,077,642" target="_blank" rel="nofollow">8,077,642</a></td>
<td valign="top">Methods and apparatus for signal echo cancellation and transmitter calibration in full duplex systems</td>
</tr>
<tr>
<td valign="top" align="right">29</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,077,157" target="_blank" rel="nofollow">8,077,157</a></td>
<td valign="top">Device, system, and method of wireless transfer of files</td>
</tr>
<tr>
<td valign="top" align="right">30</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,077,095" target="_blank" rel="nofollow">8,077,095</a></td>
<td valign="top">Multi-band highly isolated planar antennas integrated with front-end modules for mobile applications</td>
</tr>
<tr>
<td valign="top" align="right">31</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,076,776" target="_blank" rel="nofollow">8,076,776</a></td>
<td valign="top">Integrated circuit package having security feature and method of manufacturing same</td>
</tr>
<tr>
<td valign="top" align="right">32</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,076,664" target="_blank" rel="nofollow">8,076,664</a></td>
<td valign="top">Phase change memory with layered insulator</td>
</tr>
<tr>
<td valign="top" align="right">33</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,074,354" target="_blank" rel="nofollow">8,074,354</a></td>
<td valign="top">Method of making a self-balanced dual L-shaped socket</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patent applications published on 08 December 2011</title>
		<link>http://www.latestpatents.com/intel-patent-applications-published-on-08-december-2011/</link>
		<comments>http://www.latestpatents.com/intel-patent-applications-published-on-08-december-2011/#comments</comments>
		<pubDate>Fri, 09 Dec 2011 01:33:53 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patent Applications]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=15752</guid>
		<description><![CDATA[No US patent applications published on 08 December 2011 and assigned to Intel]]></description>
			<content:encoded><![CDATA[<p>No US patent applications published on 08 December 2011 and assigned to Intel</p>
]]></content:encoded>
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		<title>Intel patents granted on 06 December 2011</title>
		<link>http://www.latestpatents.com/intel-patents-granted-on-06-december-2011/</link>
		<comments>http://www.latestpatents.com/intel-patents-granted-on-06-december-2011/#comments</comments>
		<pubDate>Wed, 07 Dec 2011 00:12:07 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patents]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=15712</guid>
		<description><![CDATA[24 US patents granted on 06 December 2011 and assigned to Intel 1 8,074,274 User-level privilege management 2 8,074,262 Method and apparatus for migrating virtual trusted platform modules 3 8,074,131 Generic debug external connection (GDXC) for high integration integrated circuits 4 8,074,110 Enhancing reliability of a many-core processor 5 8,074,039 Redundant array of independent disks-related [...]]]></description>
			<content:encoded><![CDATA[<p>24 US patents granted on 06 December 2011 and assigned to Intel<br />
<span id="more-15712"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,074,274" target="_blank" rel="nofollow">8,074,274</a></td>
<td valign="top">User-level privilege management</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,074,262" target="_blank" rel="nofollow">8,074,262</a></td>
<td valign="top">Method and apparatus for migrating virtual trusted platform modules</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,074,131" target="_blank" rel="nofollow">8,074,131</a></td>
<td valign="top">Generic debug external connection (GDXC) for high integration integrated circuits</td>
</tr>
<tr>
<td valign="top" align="right">4</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,074,110" target="_blank" rel="nofollow">8,074,110</a></td>
<td valign="top">Enhancing reliability of a many-core processor</td>
</tr>
<tr>
<td valign="top" align="right">5</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,074,039" target="_blank" rel="nofollow">8,074,039</a></td>
<td valign="top">Redundant array of independent disks-related operations</td>
</tr>
<tr>
<td valign="top" align="right">6</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,074,026" target="_blank" rel="nofollow">8,074,026</a></td>
<td valign="top">Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems</td>
</tr>
<tr>
<td valign="top" align="right">7</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,074,025" target="_blank" rel="nofollow">8,074,025</a></td>
<td valign="top">Method and system for copying live entities of source blocks identified by source list for selected destination block to selected destination block of memory heap</td>
</tr>
<tr>
<td valign="top" align="right">8</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,074,017" target="_blank" rel="nofollow">8,074,017</a></td>
<td valign="top">On-disk caching for raid systems</td>
</tr>
<tr>
<td valign="top" align="right">9</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,073,981" target="_blank" rel="nofollow">8,073,981</a></td>
<td valign="top">PCI express enhancements and extensions</td>
</tr>
<tr>
<td valign="top" align="right">10</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,073,896" target="_blank" rel="nofollow">8,073,896</a></td>
<td valign="top">Client messaging in multicast networks</td>
</tr>
<tr>
<td valign="top" align="right">11</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,073,892" target="_blank" rel="nofollow">8,073,892</a></td>
<td valign="top">Cryptographic system, method and multiplier</td>
</tr>
<tr>
<td valign="top" align="right">12</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,072,946" target="_blank" rel="nofollow">8,072,946</a></td>
<td valign="top">Coordinated transmissions in wireless networks</td>
</tr>
<tr>
<td valign="top" align="right">13</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,072,941" target="_blank" rel="nofollow">8,072,941</a></td>
<td valign="top">Method and apparatus of system scheduler</td>
</tr>
<tr>
<td valign="top" align="right">14</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,072,912" target="_blank" rel="nofollow">8,072,912</a></td>
<td valign="top">Techniques for management of shared resources in wireless multi-communication devices</td>
</tr>
<tr>
<td valign="top" align="right">15</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,072,875" target="_blank" rel="nofollow">8,072,875</a></td>
<td valign="top">Avoiding collisions between users if MAP containing persistent scheduling information is lost</td>
</tr>
<tr>
<td valign="top" align="right">16</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,072,510" target="_blank" rel="nofollow">8,072,510</a></td>
<td valign="top">Audio-based attention grabber for imaging devices</td>
</tr>
<tr>
<td valign="top" align="right">17</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,072,496" target="_blank" rel="nofollow">8,072,496</a></td>
<td valign="top">Motion smoothing in video stabilization</td>
</tr>
<tr>
<td valign="top" align="right">18</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,072,451" target="_blank" rel="nofollow">8,072,451</a></td>
<td valign="top">Efficient Z testing</td>
</tr>
<tr>
<td valign="top" align="right">19</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,072,443" target="_blank" rel="nofollow">8,072,443</a></td>
<td valign="top">Techniques to switch between video display modes</td>
</tr>
<tr>
<td valign="top" align="right">20</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,072,022" target="_blank" rel="nofollow">8,072,022</a></td>
<td valign="top">Apparatus and methods for improved flash cell characteristics</td>
</tr>
<tr>
<td valign="top" align="right">21</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,072,016" target="_blank" rel="nofollow">8,072,016</a></td>
<td valign="top">EPI substrate with low doped EPI layer and high doped Si substrate layer for media growth on EPI and low contact resistance to back-side substrate</td>
</tr>
<tr>
<td valign="top" align="right">22</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,071,983" target="_blank" rel="nofollow">8,071,983</a></td>
<td valign="top">Semiconductor device structures and methods of forming semiconductor structures</td>
</tr>
<tr>
<td valign="top" align="right">23</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,071,279" target="_blank" rel="nofollow">8,071,279</a></td>
<td valign="top">Plane waves to control critical dimension</td>
</tr>
<tr>
<td valign="top" align="right">24</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,070,928" target="_blank" rel="nofollow">8,070,928</a></td>
<td valign="top">Nanofabricated structures for electric field-assisted nucleic acid extraction</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patent applications published on 01 December 2011</title>
		<link>http://www.latestpatents.com/intel-patent-applications-published-on-01-december-2011/</link>
		<comments>http://www.latestpatents.com/intel-patent-applications-published-on-01-december-2011/#comments</comments>
		<pubDate>Thu, 01 Dec 2011 23:24:54 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patent Applications]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=15672</guid>
		<description><![CDATA[5 US patent applications published on 01 December 2011 and assigned to Intel 1 20110296457 CONVERGED COMMUNICATION SERVER WITH TRANSACTION MANAGEMENT 2 20110295954 Method and apparatus for requesting media replication in a collaborative communication session, and method and apparatus for assigning a communication medium for a collaborative communication session 3 20110294264 HEAT SPREADER AS MECHANICAL [...]]]></description>
			<content:encoded><![CDATA[<p>5 US patent applications published on 01 December 2011 and assigned to Intel<br />
<span id="more-15672"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110296457.PGNR.&#038;OS=DN/20110296457RS=DN/20110296457" target="_blank">20110296457</a></td>
<td valign="top">CONVERGED COMMUNICATION SERVER WITH TRANSACTION MANAGEMENT</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110295954.PGNR.&#038;OS=DN/20110295954RS=DN/20110295954" target="_blank">20110295954</a></td>
<td valign="top">Method and apparatus for requesting media replication in a collaborative communication session, and method and apparatus for assigning a communication medium for a collaborative communication session</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110294264.PGNR.&#038;OS=DN/20110294264RS=DN/20110294264" target="_blank">20110294264</a></td>
<td valign="top">HEAT SPREADER AS MECHANICAL REINFORCEMENT FOR ULTRA-THIN DIE</td>
</tr>
<tr>
<td valign="top" align="right">4</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110294048.PGNR.&#038;OS=DN/20110294048RS=DN/20110294048" target="_blank">20110294048</a></td>
<td valign="top">MOUNTING A PELLICLE TO A FRAME</td>
</tr>
<tr>
<td valign="top" align="right">5</td>
<td valign="top" align="right"><a href="http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&#038;Sect2=HITOFF&#038;p=1&#038;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&#038;r=1&#038;f=G&#038;l=50&#038;co1=AND&#038;d=PG01&#038;s1=20110291304.PGNR.&#038;OS=DN/20110291304RS=DN/20110291304" target="_blank">20110291304</a></td>
<td valign="top">METHOD OF MAKING MICROELECTRONIC PACKAGE USING INTEGRATED HEAT SPREADER STIFFENER PANEL AND MICROELECTRONIC PACKAGE FORMED ACCORDING TO THE METHOD</td>
</tr>
</table>
]]></content:encoded>
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		<title>Intel patents granted on 29 November 2011</title>
		<link>http://www.latestpatents.com/intel-patents-granted-on-29-november-2011/</link>
		<comments>http://www.latestpatents.com/intel-patents-granted-on-29-november-2011/#comments</comments>
		<pubDate>Tue, 29 Nov 2011 15:47:57 +0000</pubDate>
		<dc:creator>Administrator</dc:creator>
				<category><![CDATA[Intel]]></category>
		<category><![CDATA[Patents]]></category>

		<guid isPermaLink="false">http://www.latestpatents.com/?p=15630</guid>
		<description><![CDATA[30 US patents granted on 29 November 2011 and assigned to Intel 1 8,069,445 Method and apparatus for detecting lock acquisition hierarchy violations and unsafe lock releases 2 8,069,376 On-line testing for decode logic 3 8,069,359 System and method to establish and dynamically control energy consumption in large-scale datacenters or IT infrastructures 4 8,069,358 Independent [...]]]></description>
			<content:encoded><![CDATA[<p>30 US patents granted on 29 November 2011 and assigned to Intel<br />
<span id="more-15630"></span></p>
<table border="2" cellpadding="4" cellspacing="0" style="border-collapse: collapse">
<tr>
<td valign="top" align="right">1</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,069,445" target="_blank" rel="nofollow">8,069,445</a></td>
<td valign="top">Method and apparatus for detecting lock acquisition hierarchy violations and unsafe lock releases</td>
</tr>
<tr>
<td valign="top" align="right">2</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,069,376" target="_blank" rel="nofollow">8,069,376</a></td>
<td valign="top">On-line testing for decode logic</td>
</tr>
<tr>
<td valign="top" align="right">3</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,069,359" target="_blank" rel="nofollow">8,069,359</a></td>
<td valign="top">System and method to establish and dynamically control energy consumption in large-scale datacenters or IT infrastructures</td>
</tr>
<tr>
<td valign="top" align="right">4</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,069,358" target="_blank" rel="nofollow">8,069,358</a></td>
<td valign="top">Independent power control of processing cores</td>
</tr>
<tr>
<td valign="top" align="right">5</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,069,327" target="_blank" rel="nofollow">8,069,327</a></td>
<td valign="top">Commands scheduled for frequency mismatch bubbles</td>
</tr>
<tr>
<td valign="top" align="right">6</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,069,311" target="_blank" rel="nofollow">8,069,311</a></td>
<td valign="top">Methods for prefetching data in a memory storage structure</td>
</tr>
<tr>
<td valign="top" align="right">7</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,069,304" target="_blank" rel="nofollow">8,069,304</a></td>
<td valign="top">Determining the presence of a pre-specified string in a message</td>
</tr>
<tr>
<td valign="top" align="right">8</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,069,299" target="_blank" rel="nofollow">8,069,299</a></td>
<td valign="top">Banded indirection for nonvolatile memory devices</td>
</tr>
<tr>
<td valign="top" align="right">9</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,069,294" target="_blank" rel="nofollow">8,069,294</a></td>
<td valign="top">Power-optimized frame synchronization for multiple USB controllers with non-uniform frame rates</td>
</tr>
<tr>
<td valign="top" align="right">10</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,069,288" target="_blank" rel="nofollow">8,069,288</a></td>
<td valign="top">Mechanism to flexibly support multiple device numbers on point-to-point interconnect upstream ports</td>
</tr>
<tr>
<td valign="top" align="right">11</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,069,199" target="_blank" rel="nofollow">8,069,199</a></td>
<td valign="top">Methods and arrangements to correct for double rounding errors when rounding floating point numbers to nearest even</td>
</tr>
<tr>
<td valign="top" align="right">12</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,069,124" target="_blank" rel="nofollow">8,069,124</a></td>
<td valign="top">Combining speculative physics modeling with goal-based artificial intelligence</td>
</tr>
<tr>
<td valign="top" align="right">13</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,844" target="_blank" rel="nofollow">8,068,844</a></td>
<td valign="top">Arrangements for beam refinement in a wireless network</td>
</tr>
<tr>
<td valign="top" align="right">14</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,804" target="_blank" rel="nofollow">8,068,804</a></td>
<td valign="top">Receiver local oscillator leakage compensation in the presence of an interferer</td>
</tr>
<tr>
<td valign="top" align="right">15</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,614" target="_blank" rel="nofollow">8,068,614</a></td>
<td valign="top">Methods and apparatus for batch bound authentication</td>
</tr>
<tr>
<td valign="top" align="right">16</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,613" target="_blank" rel="nofollow">8,068,613</a></td>
<td valign="top">Method and apparatus for remotely provisioning software-based security coprocessors</td>
</tr>
<tr>
<td valign="top" align="right">17</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,566" target="_blank" rel="nofollow">8,068,566</a></td>
<td valign="top">Unified multi-mode receiver detector</td>
</tr>
<tr>
<td valign="top" align="right">18</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,554" target="_blank" rel="nofollow">8,068,554</a></td>
<td valign="top">Multiple input, multiple output wireless communication system, associated methods and data structures</td>
</tr>
<tr>
<td valign="top" align="right">19</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,495" target="_blank" rel="nofollow">8,068,495</a></td>
<td valign="top">Mechanisms for data rate improvement in a wireless network</td>
</tr>
<tr>
<td valign="top" align="right">20</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,488" target="_blank" rel="nofollow">8,068,488</a></td>
<td valign="top">Packet format for a distributed system</td>
</tr>
<tr>
<td valign="top" align="right">21</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,459" target="_blank" rel="nofollow">8,068,459</a></td>
<td valign="top">Adaptive frequency reuse method of radio resources management and allocation</td>
</tr>
<tr>
<td valign="top" align="right">22</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,405" target="_blank" rel="nofollow">8,068,405</a></td>
<td valign="top">Ferroelectric memory and method in which polarity of domain of ferroelectric memory is determined using ratio of currents</td>
</tr>
<tr>
<td valign="top" align="right">23</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,371" target="_blank" rel="nofollow">8,068,371</a></td>
<td valign="top">Methods and systems to improve write response times of memory cells</td>
</tr>
<tr>
<td valign="top" align="right">24</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,328" target="_blank" rel="nofollow">8,068,328</a></td>
<td valign="top">Nanolithographic method of manufacturing an embedded passive device for a microelectronic application, and microelectronic device containing same</td>
</tr>
<tr>
<td valign="top" align="right">25</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,116" target="_blank" rel="nofollow">8,068,116</a></td>
<td valign="top">Methods, systems, and data structures for generating a rasterizer</td>
</tr>
<tr>
<td valign="top" align="right">26</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,068,112" target="_blank" rel="nofollow">8,068,112</a></td>
<td valign="top">Image buffering techniques</td>
</tr>
<tr>
<td valign="top" align="right">27</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,067,856" target="_blank" rel="nofollow">8,067,856</a></td>
<td valign="top">Power management system</td>
</tr>
<tr>
<td valign="top" align="right">28</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,067,818" target="_blank" rel="nofollow">8,067,818</a></td>
<td valign="top">Nonplanar device with thinned lower body portion and method of fabrication</td>
</tr>
<tr>
<td valign="top" align="right">29</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,067,266" target="_blank" rel="nofollow">8,067,266</a></td>
<td valign="top">Methods for the fabrication of microelectronic device substrates by attaching two cores together during fabrication</td>
</tr>
<tr>
<td valign="top" align="right">30</td>
<td valign="top" align="right"><a href="http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8,067,256" target="_blank" rel="nofollow">8,067,256</a></td>
<td valign="top">Method of making microelectronic package using integrated heat spreader stiffener panel and microelectronic package formed according to the method</td>
</tr>
</table>
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