IBM patent applications published on 19 May 2011

82 US patent applications published on 19 May 2011 and assigned to IBM

1 20110119771 SYSTEMS AND METHODS FOR HANDLING ELECTRONIC MESSAGES
2 20110119678 ISOLATING WORKLOAD PARTITION SPACE
3 20110119669 HYPERVISOR FILE SYSTEM
4 20110119659 RUNTIME MACHINE SUPPORTED METHOD LEVEL CACHING
5 20110119642 Simultaneous Photolithographic Mask and Target Optimization
6 20110119636 METHOD AND SYSTEM TO IMPROVE GUI USE EFFICIENCY
7 20110119628 PRIORITIZATION OF CHOICES BASED ON CONTEXT AND USER HISTORY
8 20110119581 RECORDING EVENTS IN A VIRTUAL WORLD
9 20110119526 LOCAL ROLLBACK FOR FAULT-TOLERANCE IN PARALLEL COMPUTING SYSTEMS
10 20110119524 Maintaining Communication Continuity
11 20110119523 ADAPTIVE REMOTE DECISION MAKING UNDER QUALITY OF INFORMATION REQUIREMENTS
12 20110119521 REPRODUCIBILITY IN A MULTIPROCESSOR SYSTEM
13 20110119508 Power Efficient Stack of Multicore Microprocessors
14 20110119475 GLOBAL SYNCHRONIZATION OF PARALLEL PROCESSORS USING CLOCK PULSE WIDTH MODULATION
15 20110119470 GENERATION-BASED MEMORY SYNCHRONIZATION IN A MULTIPROCESSOR SYSTEM WITH WEAKLY CONSISTENT MEMORY ACCESSES
16 20110119469 BALANCING WORKLOAD IN A MULTIPROCESSOR SYSTEM RESPONSIVE TO PROGRAMMABLE ADJUSTMENTS IN A SYNCRONIZATION INSTRUCTION
17 20110119468 MECHANISM OF SUPPORTING SUB-COMMUNICATOR COLLECTIVES WITH O(64) COUNTERS AS OPPOSED TO ONE COUNTER FOR EACH SUB-COMMUNICATOR
18 20110119466 Clearing Selected Storage Translation Buffer Entries Bases On Table Origin Address
19 20110119452 Hybrid Transactional Memory System (HybridTM) and Method
20 20110119446 CONDITIONAL LOAD AND STORE IN A SHARED CACHE
21 20110119445 HEAP/STACK GUARD PAGES USING A WAKEUP UNIT
22 20110119444 ADAPTIVE CACHING OF DATA
23 20110119441 SELECTIVE DEVICE ACCESS CONTROL
24 20110119439 Spacing Periodic Commands to a Volatile Memory for Increased Performance and Decreased Collision
25 20110119427 SYMMETRIC LIVE MIGRATION OF VIRTUAL MACHINES
26 20110119426 LIST BASED PREFETCH
27 20110119408 METHOD AND SYSTEM FOR CONNECTING A HOST AND MULTIPLE STORAGE DEVICES FORMED BY OPTICAL INTERCONNECTS AND OPTICAL LINK CREATION METHOD
28 20110119399 DEADLOCK-FREE CLASS ROUTES FOR COLLECTIVE COMMUNICATIONS EMBEDDED IN A MULTI-DIMENSIONAL TORUS NETWORK
29 20110119388 Optimization of Multimedia Service Over an IMS Network
30 20110119379 GEO-POSITIONALLY BASED DATA ACCESS SECURITY
31 20110119367 Methods and Apparatus for Randomization of Periodic Behavior in Communication Network
32 20110119338 EMAIL COMPOSITION AND PROCESSING
33 20110119336 REMOTE COMMAND EXECUTION OVER A NETWORK
34 20110119322 On-Chip Networks for Flexible Three-Dimensional Chip Integration
35 20110119306 User-Based DNS Server Access Control
36 20110119286 APPARATUS AND METHOD FOR PROVIDING A CONDITION BUILDER INTERFACE
37 20110119264 RANKING EXPERT RESPONSES AND FINDING EXPERTS BASED ON RANK
38 20110119263 INFORMATION COLLECTION APPARATUS, SEARCH ENGINE, INFORMATION COLLECTION METHOD, AND PROGRAM
39 20110119254 INFERENCE-DRIVEN MULTI-SOURCE SEMANTIC SEARCH
40 20110119253 SECURING SEARCH QUERIES
41 20110119223 ASSET ADVISORY INTELLIGENCE ENGINE FOR MANAGING REUSABLE SOFTWARE ASSETS
42 20110119215 HARDWARE ANALOG-DIGITAL NEURAL NETWORKS
43 20110119214 AREA EFFICIENT NEUROMORPHIC CIRCUITS
44 20110119192 MESSAGING SYSTEM
45 20110119191 LICENSE OPTIMIZATION IN A VIRTUALIZED ENVIRONMENT
46 20110119167 PROVIDING REMOVABLE STORAGE MANAGEMENT SERVICES USING REMOVABLE STORAGE ERROR INFORMATION
47 20110119143 Pricing Remote Information Technology Infrastructure Monitoring Services
48 20110119068 ZONE AWARE TASK MANAGEMENT UTILIZING USER GENERATED PRESENCE HISTORY
49 20110119060 METHOD AND SYSTEM FOR SPEAKER DIARIZATION
50 20110119030 DESIGN OF EXPERIMENT PARAMETERS FOR WALD’S SEQUENTIAL TESTS BASED ON CONTINUED FRACTIONS
51 20110118984 METHOD AND SYSTEM FOR RETRIEVING SEISMIC DATA FROM A SEISMIC SECTION IN BITMAP FORMAT
52 20110118862 METHOD AND SYSTEM FOR WORKLOAD BALANCING TO ASSIST IN POWER GRID LOAD MANAGEMENT
53 20110117886 METHOD AND SYSTEM FOR CONTROLLING DELIVERY OF NOTIFICATIONS IN REAL-TIME COMMUNICATIONS BASED ON COMMUNICATION CHANNEL STATE
54 20110117714 Integration of Multiple Gate Oxides with Shallow Trench Isolation Methods to Minimize Divot Formation
55 20110117711 DOUBLE GATE DEPLETION MODE MOSFET
56 20110117539 Detection of an Analyte in a Sample
57 20110116312 NON VOLATILE CELL AND ARCHITECTURE WITH SINGLE BIT RANDOM ACCESS READ, PROGRAM AND ERASE
58 20110116307 PHASE CHANGE MEMORY DEVICE SUITABLE FOR HIGH TEMPERATURE OPERATION
59 20110116185 TRANSPORT SPEED ADJUSTMENT DEVICE, TRANSPORT SPEED ADJUSTMENT METHOD AND TRANSPORT SPEED ADJUSTMENT PROGRAM FOR ADJUSTING TRANSPORT SPEED OF TAPE MEDIUM
60 20110116135 MULTIBIT DIGITAL HALFTONING
61 20110115794 RULE-BASED GRAPH LAYOUT DESIGN
62 20110115553 SOI CMOS STRUCTURE HAVING PROGRAMMABLE FLOATING BACKPLATE
63 20110115508 DETERMINING CRITICAL CURRENT DENSITY FOR INTERCONNECT
64 20110115463 DIFFERENTIAL FET STRUCTURES FOR ELECTRICAL MONITORING OF OVERLAY
65 20110115094 STRUCTURES AND METHODS FOR PHOTO-PATTERNABLE LOW-k (PPLK) INTEGRATION
66 20110115090 INTERCONNECT STRUCTURE INCLUDING A MODIFIED PHOTORESIST AS A PERMANENT INTERCONNECT DIELECTRIC AND METHOD OF FABRICATING SAME
67 20110115087 SELF-ALIGNED LOWER BOTTOM ELECTRODE
68 20110115082 CONFIGURABLE INTERPOSER
69 20110115072 ULTRAVIOLET ENERGY CURABLE TAPE AND METHOD OF MAKING A SEMICONDUCTOR CHIP USING THE TAPE
70 20110115054 SEMISPHERICAL INTEGRATED CIRCUIT STRUCTURES
71 20110115044 DIFFUSION SIDEWALL FOR A SEMICONDUCTOR STRUCTURE
72 20110115032 HIGH-K/METAL GATE TRANSISTOR WITH L-SHAPED GATE ENCAPSULATION LAYER
73 20110115027 STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS
74 20110115026 CONTROL OF THRESHOLD VOLTAGES IN HIGH-K METAL GATE STACK AND STRUCTURES FOR CMOS DEVICES
75 20110115023 HYBRID FinFET/PLANAR SOI FETs
76 20110115022 IMPLANT FREE EXTREMELY THIN SEMICONDUCTOR DEVICES
77 20110115021 ISOLATION STRUCTURES FOR SOI DEVICES WITH ULTRATHIN SOI AND ULTRATHIN BOX
78 20110115005 MIM CAPACITOR STRUCTURE IN FEOL AND RELATED METHOD
79 20110115004 EMBEDDED PHOTODETECTOR APPARATUS IN A 3D CMOS CHIP STACK
80 20110114920 SYSTEM AND METHOD OF QUANTUM COMPUTING USING THREE-STATE REPRESENTATION OF A QUBIT
81 20110114919 SELF-ALIGNED GRAPHENE TRANSISTOR
82 20110114918 FABRICATION OF GRAPHENE NANOELECTRONIC DEVICES ON SOI STRUCTURES