56 US patents granted on 05 January 2010 and assigned to IBM
| 1 | 7,644,412 | Separate encapsulation of communication operations in computer algorithms |
| 2 | 7,644,401 | Executable file creation |
| 3 | 7,644,394 | Object-oriented creation breakpoints |
| 4 | 7,644,327 | System and method of providing error detection and correction capability in an integrated circuit using redundant logic cells of an embedded FPGA |
| 5 | 7,644,321 | Autonomically adjusting configuration parameters for a server when a different server fails |
| 6 | 7,644,316 | System, method and program for managing browser scripts sent from server to client |
| 7 | 7,644,313 | Method, apparatus and program product for a point-in-time recovery of a computing system |
| 8 | 7,644,312 | Virtual machine monitoring for application operation diagnostics |
| 9 | 7,644,291 | Device throttling system from neighboring device |
| 10 | 7,644,280 | Method and system for linking certificates to signed files |
| 11 | 7,644,278 | Method for securely creating an endorsement certificate in an insecure environment |
| 12 | 7,644,266 | Apparatus, system, and method for message level security |
| 13 | 7,644,254 | Routing data packets with hint bit for each six orthogonal directions in three dimensional torus computer system set to avoid nodes in problem list |
| 14 | 7,644,233 | Apparatus and method for supporting simultaneous storage of trace and standard cache lines |
| 15 | 7,644,231 | Selective information caching on disk drive |
| 16 | 7,644,216 | System and method for providing an adapter for re-use of legacy DIMMS in a fully buffered memory environment |
| 17 | 7,644,201 | Method and system for performance enhancement via transaction verification using a counter value in a polled data storage environment |
| 18 | 7,644,198 | DMAC translation mechanism |
| 19 | 7,644,184 | Universal adapter |
| 20 | 7,644,141 | High-availability identification and application installation |
| 21 | 7,644,133 | System in an office application for providing content dependent help information |
| 22 | 7,644,118 | Methods, systems, and media to enhance persistence of a message |
| 23 | 7,644,112 | Apparatus, system, and method for initializing a synchronized remote database |
| 24 | 7,644,095 | Method and system for compound document assembly with domain-specific rules processing and generic schema mapping |
| 25 | 7,644,071 | Selective display of target areas in a document |
| 26 | 7,644,069 | Search ranking method for file system and related search engine |
| 27 | 7,644,068 | Selecting records from a list with privacy protections |
| 28 | 7,644,063 | Apparatus, system, and method for ensuring query execution plan stability in a database management system |
| 29 | 7,644,057 | System and method for electronic communication management |
| 30 | 7,644,050 | Method and apparatus for annotation-based behavior extensions |
| 31 | 7,643,982 | Debugging prototyped system solutions in solution builder wizard environment |
| 32 | 7,643,981 | Pulse waveform timing in EinsTLT templates |
| 33 | 7,643,836 | Determining approximate locations of network devices that are inaccessible to GPS signals |
| 34 | 7,643,797 | Radio frequency identification (RFID) system for dynamically and automatically establishing communication between a mobile wireless communicating device and a data processing system |
| 35 | 7,643,591 | Transition balancing for noise reduction /Di/Dt reduction during design, synthesis, and physical design |
| 36 | 7,643,511 | Frame alteration logic for network processors |
| 37 | 7,643,357 | System and method for integrating dynamic leakage reduction with write-assisted SRAM architecture |
| 38 | 7,643,307 | Fail safe redundant power supply in a multi-node computer system |
| 39 | 7,643,306 | Apparatus for inserting and ejecting an electronic enclosure within a cabinet |
| 40 | 7,643,268 | High capacitance density vertical natural capacitors |
| 41 | 7,642,914 | Auto-locating system and method for data center mapping and monitoring |
| 42 | 7,642,864 | Circuits and design structures for monitoring NBTI (negative bias temperature instability) effect and/or PBTI (positive bias temperature instability) effect |
| 43 | 7,642,863 | Systems and methods for PLL linearity measurement, PLL output duty cycle measurement and duty cycle correction |
| 44 | 7,642,813 | Error correcting logic system |
| 45 | 7,642,588 | Memory cells with planar FETs and vertical FETs with a region only in upper region of a trench and methods of making and using same |
| 46 | 7,642,582 | Imagers having electrically active optical elements |
| 47 | 7,642,569 | Transistor structure with minimized parasitics and method of fabricating the same |
| 48 | 7,642,549 | Phase change memory cells delineated by regions of modified film resistivity |
| 49 | 7,642,147 | Methods for removing sidewall spacers |
| 50 | 7,642,125 | Phase change memory cell in via array with self-aligned, self-converged bottom electrode and method for manufacturing |
| 51 | 7,642,020 | Method for separating optical and resist effects in process models |
| 52 | 7,642,016 | Phase calibration for attenuating phase-shift masks |
| 53 | 7,641,811 | Enhanced thermal conducting formulations |
| 54 | 7,641,479 | Land grid array interposer (LGA) utilizing metal-on-elastomer hemi-torus and other multiple points of contact geometries that is constituted of a moldable dielectric elastometric material |
| 55 | 7,641,101 | Method of assembling a cooling system for a multi-component electronics system |
| 56 | 7,640,788 | Wear gauge and method of use |
