120 US patents granted on 05 July 2016 and assigned to IBM
| 1 | 9,386,736 | Modular elements employing latches secured by linkages |
| 2 | 9,386,727 | Apparatus for adjusting coolant flow resistance through liquid-cooled electronics racks |
| 3 | 9,386,713 | Modular elements employing latches secured by linkages |
| 4 | 9,386,145 | Monitoring voice over internet protocol (VoIP) quality during an ongoing call |
| 5 | 9,386,119 | Mobile web adaptation techniques |
| 6 | 9,386,092 | Cost optimized email attachment download in a mobile device |
| 7 | 9,386,087 | Workload placement in a computer system |
| 8 | 9,386,073 | Techniques for performing processing for database |
| 9 | 9,385,982 | Identification to a recipient of an electronic communication of another user who has accessed the electronic communication |
| 10 | 9,385,978 | Generating and/or providing access to a message based on portions of the message indicated by a sending user |
| 11 | 9,385,975 | Using content based routing to scale cast iron like appliances |
| 12 | 9,385,967 | Resource allocation for a storage area network |
| 13 | 9,385,936 | Forwarding groups of multicast flows |
| 14 | 9,385,934 | Dynamic network monitoring |
| 15 | 9,385,872 | Reissue of cryptographic credentials |
| 16 | 9,385,729 | System and method for controlling a phase lock loop |
| 17 | 9,385,294 | Diamond substrates for superconducting quantum circuits |
| 18 | 9,385,237 | Source and drain doping profile control employing carbon-doped semiconductor material |
| 19 | 9,385,218 | Method and structure for forming dielectric isolated FinFET with improved source/drain epitaxy |
| 20 | 9,385,207 | Stratified gate dielectric stack for gate dielectric leakage reduction |
| 21 | 9,385,201 | Buried source-drain contact for integrated circuit transistor devices and method of making same |
| 22 | 9,385,177 | Technique for fabrication of microelectronic capacitors and resistors |
| 23 | 9,385,123 | STI region for small fin pitch in FinFET devices |
| 24 | 9,385,078 | Self aligned via in integrated circuit |
| 25 | 9,385,062 | Integrated circuit barrierless microfluidic channel |
| 26 | 9,385,039 | Formation of through-silicon via (TSV) in silicon substrate |
| 27 | 9,385,038 | Selective local metal cap layer formation for improved electromigration behavior |
| 28 | 9,384,975 | Nanowire devices |
| 29 | 9,384,879 | Magnetic multilayer structure |
| 30 | 9,384,857 | Error control using threshold based comparison of error signatures |
| 31 | 9,384,834 | Storage device with 2D configuration of phase change memory integrated circuits |
| 32 | 9,384,823 | SRAM array comprising multiple cell cores |
| 33 | 9,384,777 | Efficient elimination of access to data on a writable storage media |
| 34 | 9,384,764 | Electrically conductive magnetic shield laminate structure for contact recording sensor |
| 35 | 9,384,730 | Pronunciation accuracy in speech recognition |
| 36 | 9,384,728 | Synthesizing an aggregate voice |
| 37 | 9,384,661 | Cognitive needs-based trip planning |
| 38 | 9,384,488 | System and methods for credentialing on-line information providers |
| 39 | 9,384,475 | Managing multiple and/or repeated out of office notification periods |
| 40 | 9,384,469 | Modifying environmental chat distance based on avatar population density in an area of a virtual world |
| 41 | 9,384,450 | Training machine learning models for open-domain question answering system |
| 42 | 9,384,445 | Tooling for implementing business processes using web services |
| 43 | 9,384,406 | Determining a computer’s position and system for manufacturing a tag |
| 44 | 9,384,354 | Rule matching in the presence of languages with no types or as an adjunct to current analyses for security vulnerability analysis |
| 45 | 9,384,316 | Path-based congestion reduction in integrated circuit routing |
| 46 | 9,384,314 | Reduction of warpage of multilayered substrate or package |
| 47 | 9,384,305 | Predicting the impact of change on events detected in application logic |
| 48 | 9,384,302 | Generating differences for tuple attributes |
| 49 | 9,384,301 | Accessing objects in a service registry and repository |
| 50 | 9,384,263 | Leveraging enterprise content |
| 51 | 9,384,257 | Providing multiple concurrent transactions on a single database schema using a single concurrent transaction database infrastructure |
| 52 | 9,384,256 | Reporting and summarizing metrics in sparse relationships on an OLTP database |
| 53 | 9,384,255 | Managing remote data replication |
| 54 | 9,384,252 | User initiated replication in a synchronized object replication system |
| 55 | 9,384,251 | Synchronization of off-line reports and off-line mobile content packages |
| 56 | 9,384,248 | Database query language gateway |
| 57 | 9,384,247 | Plural architecture master data management with supplemental attributes |
| 58 | 9,384,246 | Plural architecture master data management with supplemental attributes |
| 59 | 9,384,229 | Data readiness using initiator region last commit selection |
| 60 | 9,384,220 | Optimizing database definitions for a new database |
| 61 | 9,384,193 | Use and enforcement of provenance and lineage constraints |
| 62 | 9,384,191 | Written language learning using an enhanced input method editor (IME) |
| 63 | 9,384,184 | Predicting a command in a command line interface |
| 64 | 9,384,159 | Creating a checkpoint for a software partition in an asynchronous input/output environment |
| 65 | 9,384,158 | Dynamic universal port mode assignment |
| 66 | 9,384,157 | Intercomponent data communication |
| 67 | 9,384,146 | Dynamic reservations in a unified request queue |
| 68 | 9,384,143 | Selecting cache lists indicating tracks in a cache to process for demotion |
| 69 | 9,384,142 | Efficient and consistent para-virtual I/O system |
| 70 | 9,384,136 | Modification of prefetch depth based on high latency event |
| 71 | 9,384,133 | Synchronizing updates of page table status indicators and performing bulk operations |
| 72 | 9,384,131 | Systems and methods for accessing cache memory |
| 73 | 9,384,130 | Rewriting symbol address initialization sequences |
| 74 | 9,384,120 | Testing of transaction tracking software |
| 75 | 9,384,118 | Overlay identification of data processing target structure |
| 76 | 9,384,108 | Functional built-in self test for a chip |
| 77 | 9,384,104 | Testing a processor assembly |
| 78 | 9,384,095 | Recovering from a defective boot image |
| 79 | 9,384,086 | I/O operation-level error checking |
| 80 | 9,384,080 | Synchronizing problem resolution task status using awareness of current state and transaction history |
| 81 | 9,384,067 | Managing a virtual object |
| 82 | 9,384,061 | Dynamically managing workload placements in virtualized environments based on current user globalization customization requests |
| 83 | 9,384,057 | Programmatic load-based management of processor population |
| 84 | 9,384,055 | Programmatic load-based management of processor population |
| 85 | 9,384,045 | Intelligent inclusion/exclusion automation |
| 86 | 9,384,044 | Intelligent inclusion/exclusion automation |
| 87 | 9,384,042 | Techniques for dynamically assigning jobs to processors in a cluster based on inter-thread communications |
| 88 | 9,384,034 | Detecting operation of a virtual machine |
| 89 | 9,384,027 | Selecting a host for a virtual machine using a hardware multithreading parameter |
| 90 | 9,384,019 | Dynamic code injection |
| 91 | 9,384,011 | Workspace creation and management for a computing desktop |
| 92 | 9,384,004 | Randomized testing within transactional execution |
| 93 | 9,384,002 | Speculative finish of instruction execution in a processor core |
| 94 | 9,384,000 | Caching optimized internal instructions in loop buffer |
| 95 | 9,383,996 | Instruction to load data up to a specified memory boundary indicated by the instruction |
| 96 | 9,383,993 | Enterprise wide software version recommendation |
| 97 | 9,383,992 | Enterprise wide software version recommendation |
| 98 | 9,383,984 | Seal-based regulation for software deployment management |
| 99 | 9,383,980 | Determining a method to inline using an actual footprint calculation |
| 100 | 9,383,971 | Mobilize website using representational state transfer (REST) resources |
| 101 | 9,383,945 | Method of writing a file to a plurality of media and a storage system thereof |
| 102 | 9,383,941 | Migrating and retrieving queued data in byte-addressable storage |
| 103 | 9,383,939 | Migrating and retrieving queued data in byte-addressable storage |
| 104 | 9,383,938 | Method, system, and apparatus for re-conveying input/output operations utilizing a sequential-access data storage device secondary communication port |
| 105 | 9,383,931 | Controlling the selectively setting of operational parameters for an adapter |
| 106 | 9,383,930 | Code optimization to enable and disable coalescing of memory transactions |
| 107 | 9,383,925 | Page compression strategy for improved page out process |
| 108 | 9,383,912 | Data pasting method and apparatus |
| 109 | 9,383,900 | Enabling real-time operational environment conformity to an enterprise model |
| 110 | 9,383,897 | Spiraling radial menus in computer systems |
| 111 | 9,383,810 | Remote power down control of a device |
| 112 | 9,383,800 | Managing a portal application |
| 113 | 9,383,767 | Circuit design for balanced logic stress |
| 114 | 9,383,766 | Chip performance monitoring system and method |
| 115 | 9,383,733 | Dynamic position control for electronic components |
| 116 | 9,383,411 | Three-dimensional processing system having at least one layer with circuitry dedicated to scan testing and system state checkpointing of other system layers |
| 117 | 9,383,409 | Method of diagnosable scan chain |
| 118 | 9,383,216 | Providing online mapping with user selected preferences |
| 119 | 9,382,747 | Pro-active building protection system |
| 120 | 9,381,438 | Dynamically displaying personalized content in an immersive environment |
