139 US patents granted on 09 February 2010 and assigned to IBM
| 1 | 7,661,147 | System for controlling use of digitally encoded products |
| 2 | 7,661,139 | System and method for detecting invalid access to computer network |
| 3 | 7,661,137 | Distributed computation in untrusted computing environments using distractive computational units |
| 4 | 7,661,135 | Apparatus, system, and method for gathering trace data indicative of resource activity |
| 5 | 7,661,125 | System for providing and utilizing a network trusted context |
| 6 | 7,661,115 | Method, apparatus and program storage device for preserving locked pages in memory when in user mode |
| 7 | 7,661,099 | Using idempotent operations to improve transaction performance |
| 8 | 7,661,098 | Computer program optimization in a dynamic compilation environment |
| 9 | 7,661,092 | Intelligent reuse of local variables during bytecode compilation |
| 10 | 7,661,084 | Implementing memory read data eye stretcher |
| 11 | 7,661,081 | Content based yield prediction of VLSI designs |
| 12 | 7,661,080 | Method and apparatus for net-aware critical area extraction |
| 13 | 7,661,077 | Structure for imagers having electrically active optical elements |
| 14 | 7,661,067 | Method for providing quick responses in instant messaging conversations |
| 15 | 7,661,061 | Visualization of collaborative portlet sequences |
| 16 | 7,661,052 | Using statistical signatures for testing high-speed circuits |
| 17 | 7,661,050 | Method and system for formal verification of partial good self test fencing structures |
| 18 | 7,661,047 | Method and dual interlocked storage cell latch for implementing enhanced testability |
| 19 | 7,661,046 | Method and dual interlocked storage cell latch for implementing enhanced testability |
| 20 | 7,661,045 | Method and system for enterprise memory management of memory modules |
| 21 | 7,661,044 | Method, apparatus and program product to concurrently detect, repair, verify and isolate memory failures |
| 22 | 7,661,039 | Self-synchronizing bit error analyzer and circuit |
| 23 | 7,661,035 | Method and system for instruction tracing with enhanced interrupt avoidance |
| 24 | 7,661,034 | Multilayered architecture for storage protocol conformance testing of storage devices |
| 25 | 7,661,033 | Method and system for establishing network connections |
| 26 | 7,661,032 | Adjusting sliding window parameters in intelligent event archiving and failure analysis |
| 27 | 7,661,031 | Correlating macro and error data for debugging program error event |
| 28 | 7,661,026 | Access by distributed computers to a same hardware resource |
| 29 | 7,661,023 | System and method for verification of cache snoop logic and coherency between instruction & data caches for processor design verification and validation |
| 30 | 7,661,022 | System for error handling in a dual adaptor system where one adaptor is a master |
| 31 | 7,661,018 | Method, apparatus and program storage device for providing automatic recovery from premature reboot of a system during a concurrent upgrade |
| 32 | 7,661,017 | Diagnostic operations within a switched fibre channel arbitrated loop system |
| 33 | 7,661,012 | Spare device management |
| 34 | 7,661,008 | Real time clock circuit having an internal clock generator |
| 35 | 7,661,006 | Method and apparatus for self-healing symmetric multi-processor system interconnects |
| 36 | 7,660,997 | Using biometrics on pervasive devices for mobile identification |
| 37 | 7,660,991 | Embedding, processing and detection of digital content, information and data |
| 38 | 7,660,978 | System and method to provide device unique diagnostic support with a single generic command |
| 39 | 7,660,971 | Method and system for dependency tracking and flush recovery for an out-of-order microprocessor |
| 40 | 7,660,965 | Method to optimize effective page number to real page number translation path from page table entries match resumption of execution stream |
| 41 | 7,660,964 | Windowing external block translations |
| 42 | 7,660,962 | Use of memory compression algorithm to assess efficiency of memory usage |
| 43 | 7,660,959 | Managing encryption for volumes in storage pools |
| 44 | 7,660,958 | Maintaining consistency for remote copy using virtualization |
| 45 | 7,660,955 | Node polling in consistency group formation |
| 46 | 7,660,952 | Data bus bandwidth scheduling in an FBDIMM memory system operating in variable latency mode |
| 47 | 7,660,948 | Arranging and destaging data to holographic storage |
| 48 | 7,660,943 | Data storage drive for automated data storage library |
| 49 | 7,660,942 | Daisy chainable self timed memory chip |
| 50 | 7,660,940 | Carrier having daisy chain of self timed memory chips |
| 51 | 7,660,930 | Method of fabricating a portable computer apparatus with thermal enhancements and multiple power modes of operation |
| 52 | 7,660,927 | Apparatus and method to control access to stored information |
| 53 | 7,660,925 | Balancing PCI-express bandwidth |
| 54 | 7,660,919 | System and method for dynamically assigning I/O priority |
| 55 | 7,660,917 | System and method of implementing multiple internal virtual channels based on a single external virtual channel |
| 56 | 7,660,912 | I/O adapter LPAR isolation in a hypertransport environment |
| 57 | 7,660,908 | Implementing virtual packet storage via packet work area |
| 58 | 7,660,897 | Method, system, and program for distributing application transactions among work servers |
| 59 | 7,660,893 | Method and system for monitoring and instantly identifying faults in data communication cables |
| 60 | 7,660,888 | Indicating network resource availability methods, system and program product |
| 61 | 7,660,886 | Apparatus and method of representing real-time distributed command execution status across distributed systems |
| 62 | 7,660,884 | Apparatus, system, and method for generating a resource utilization description for a parallel data processing system |
| 63 | 7,660,872 | Managing location information for a group of users |
| 64 | 7,660,866 | Use of virtual targets for preparing and servicing requests for server-free data transfer operations |
| 65 | 7,660,855 | Using a prediction algorithm on the addressee field in electronic mail systems |
| 66 | 7,660,847 | Unattended installation of drivers for devices that are not automatically found and installed during operating system installation |
| 67 | 7,660,846 | Method for dynamically targeted instant messaging |
| 68 | 7,660,844 | Network service system and program using data processing |
| 69 | 7,660,838 | System and method for performing decimal to binary conversion |
| 70 | 7,660,836 | Controlling incremental backups using opaque object attributes |
| 71 | 7,660,834 | Maintaining an aggregate including active files in a storage pool |
| 72 | 7,660,826 | Implementing adaptive buffer management on network fetches of directory contents and object attributes |
| 73 | 7,660,818 | Method and apparatus for querying program design models |
| 74 | 7,660,787 | Customized, personalized, integrated client-side search indexing of the web |
| 75 | 7,660,770 | System and method for providing a secure contact management system |
| 76 | 7,660,769 | System and method for digital content player with secure processing vault |
| 77 | 7,660,733 | Method of arranging supplemental meeting services |
| 78 | 7,660,731 | Method and apparatus for technology resource management |
| 79 | 7,660,723 | Ranking method and system |
| 80 | 7,660,702 | Monitor for an information technology system |
| 81 | 7,660,641 | System, graphical user interface (GUI), method and program product for configuring an assembly line |
| 82 | 7,660,459 | Method and system for predicting customer behavior based on data network geography |
| 83 | 7,660,399 | Voice processing system |
| 84 | 7,660,350 | High-speed multi-mode receiver |
| 85 | 7,660,322 | Shared adapter |
| 86 | 7,660,269 | Apparatus, method, and program for creating network configuration information |
| 87 | 7,660,265 | Network packet inspection and forwarding |
| 88 | 7,660,255 | System and method for routing IP datagrams |
| 89 | 7,660,251 | Method and apparatus for hierarchial scheduling of virtual paths with underutilized bandwidth |
| 90 | 7,660,247 | Dynamic load-based credit distribution |
| 91 | 7,660,246 | Method and apparatus for scaling input bandwidth for bandwidth allocation technology |
| 92 | 7,660,152 | Method and apparatus for implementing self-referencing read operation for PCRAM devices |
| 93 | 7,660,121 | System of facilitating cooling of electronics racks of a data center employing multiple cooling stations |
| 94 | 7,660,116 | Rack with integrated rear-door heat exchanger |
| 95 | 7,660,111 | Removable cooling duct with interlocking dovetail connections for an air tight thermal seal |
| 96 | 7,660,109 | Apparatus and method for facilitating cooling of an electronics system |
| 97 | 7,660,108 | Apparatus for positioning electronic component modules within an equipment chassis |
| 98 | 7,660,076 | Helical gear actuator for tape drive systems |
| 99 | 7,660,072 | Magnetic head with planar outrigger |
| 100 | 7,660,063 | Managing data storage media and multiple cartridge memories of a data storage cartridge |
| 101 | 7,659,895 | Multidimensional visualization method |
| 102 | 7,659,821 | Smart radio-frequency identification (RFID) infrastructure and method |
| 103 | 7,659,814 | Method for distributed sound collection and event triggering |
| 104 | 7,659,763 | Conditioning input buffer for clock interpolation |
| 105 | 7,659,749 | Pulsed dynamic logic environment metric measurement circuit |
| 106 | 7,659,740 | System and method of digitally testing an analog driver circuit |
| 107 | 7,659,733 | Electrical open/short contact alignment structure for active region vs. gate region |
| 108 | 7,659,697 | Apparatus and method to provide power to battery-backup assemblies disposed in an information storage and retrieval system |
| 109 | 7,659,616 | On-chip cooling systems for integrated circuits |
| 110 | 7,659,599 | Patterned silicon-on-insulator layers and methods for forming the same |
| 111 | 7,659,598 | Semiconductor ground shield |
| 112 | 7,659,583 | Ultrathin SOI CMOS devices employing differential STI liners |
| 113 | 7,659,581 | Transistor with dielectric stressor element fully underlying the active semiconductor region |
| 114 | 7,659,579 | FETS with self-aligned bodies and backgate holes |
| 115 | 7,659,564 | CMOS imager photodiode with enhanced capacitance |
| 116 | 7,659,535 | High speed data channel including a CMOS VCSEL driver and a high performance photodetector and CMOS photoreceiver |
| 117 | 7,659,534 | Programmable via devices with air gap isolation |
| 118 | 7,659,497 | On demand circuit function execution employing optical sensing |
| 119 | 7,659,483 | Electroactive polymer compressed gasket for electromagnetic shielding |
| 120 | 7,659,482 | Adapter card electromagnetic compatibility shielding |
| 121 | 7,659,200 | Self-constrained anisotropic germanium nanostructure from electroplating |
| 122 | 7,659,199 | Air break for improved silicide formation with composite caps |
| 123 | 7,659,178 | Semiconductor device structures with reduced junction capacitance and drain induced barrier lowering and methods for fabricating such device structures and for fabricating a semiconductor-on-insulator substrate |
| 124 | 7,659,176 | Tunable temperature coefficient of resistance resistors and method of fabricating same |
| 125 | 7,659,174 | Method to enhance device performance with selective stress relief |
| 126 | 7,659,172 | Structure and method for reducing miller capacitance in field effect transistors |
| 127 | 7,659,171 | Methods and structure for forming self-aligned borderless contacts for strain engineered logic devices |
| 128 | 7,659,168 | eFuse and methods of manufacturing the same |
| 129 | 7,659,160 | Field effect transistors (FETS) with inverted source/drain metallic contacts, and method of fabrication same |
| 130 | 7,659,157 | Dual metal gate finFETs with single or dual high-K gate dielectric |
| 131 | 7,659,155 | Method of forming a transistor having gate and body in direct self-aligned contact |
| 132 | 7,659,153 | Sectional field effect devices and method of fabrication |
| 133 | 7,659,050 | High resolution silicon-containing resist |
| 134 | 7,658,865 | Conducting liquid crystal polymer matrix comprising carbon nanotubes, use thereof and method of fabrication |
| 135 | 7,658,617 | Plastic land grid array (PLGA) module with inverted hybrid land grid array (LGA) interposer |
| 136 | 7,658,616 | Groups of land grid interposers of different heights having metal-on elastomer hemi-torus shapes providing for electrical contact with at least one component on an opposite side of an electrically insulating carrier plate mounting interposers |
| 137 | 7,658,380 | Adaptive and predictive document tracking system |
| 138 | 7,658,344 | Housing for information storage medium and method using same |
| 139 | 7,657,995 | Method of fabricating a microelectromechanical system (MEMS) switch |