IBM patents granted on 21 October 2008

97 US patents granted on 21 October 2008 and assigned to IBM

1 7,441,264 Security objects controlling access to resources
2 7,441,254 Simulation of memory-mapped I/O
3 7,441,249 Activity monitoring without accessing a process object
4 7,441,247 Resource management method and system with active associations
5 7,441,244 Workload scheduler with cumulative weighting indexes
6 7,441,243 Exception handling in the processing of proposal requests in a grid computing environment
7 7,441,242 Monitoring performance of a logically-partitioned computer
8 7,441,241 Grid non-deterministic job scheduling
9 7,441,229 Model driven portlet development method, system and program product
10 7,441,216 Applying CNF simplification techniques for SAT-based abstraction refinement
11 7,441,213 Method for testing the validity of initial-condition statements in circuit simulation, and correcting inconsistencies thereof
12 7,441,209 Method, system and program product for providing a configuration specification language supporting error checking dials
13 7,441,187 Web template processing utilizing dynamic rules defined by data structure language
14 7,441,171 Efficient scan chain insertion using broadcast scan for reduced bit collisions
15 7,441,147 System and method for storing and restoring a data file using several storage media
16 7,441,135 Adaptive dynamic buffering system for power management in server clusters
17 7,441,119 Offload processing for secure data transfer
18 7,441,116 Secure resource distribution through encrypted pointers
19 7,441,110 Prefetching using future branch path information derived from branch prediction
20 7,441,079 Data location management in high density packaging
21 7,441,073 System for indicating a plug position for a memory module in a memory system
22 7,441,060 System, method and storage medium for providing a service interface to a memory system
23 7,441,057 System and method for providing character interactive input/output
24 7,441,051 Apparatus and method for managing configuration of computer systems on a computer network
25 7,441,036 Method and system for a debugging utility based on a TCP tunnel
26 7,441,010 Method and system for determining the availability of in-line resources within requested web pages
27 7,441,008 Method for correlating transactions and messages
28 7,441,006 Reducing number of write operations relative to delivery of out-of-order RDMA send messages by managing reference counter
29 7,441,000 Method for session sharing
30 7,440,984 Reconciliation of local and remote backup data
31 7,440,966 Method and apparatus for file system snapshot persistence
32 7,440,960 Result set management
33 7,440,958 Trusted access by an extendible framework method
34 7,440,956 Enforcing constraints from a parent table to a child table
35 7,440,952 Systems, methods, and computer products for information sharing using personalized index caching
36 7,440,945 Dynamic discovery of abstract rule set required inputs
37 7,440,937 Self join elimination through union
38 7,440,936 Method for determining an access mode to a dataset
39 7,440,935 Method and system for query directives and access plan hints
40 7,440,933 Method for facilitating problem resolution
41 7,440,932 Method and system for automating issue resolution in manufacturing execution and material control systems
42 7,440,910 System and method for renewing business, professional, and personal contacts
43 7,440,902 Service development tool and capabilities for facilitating management of service elements
44 7,440,894 Method and system for creation of voice training profiles with multiple methods with uniform server mechanism using heterogeneous devices
45 7,440,888 Methods, systems and computer program products for national language support using a multi-language property file
46 7,440,668 Devices and methods for side-coupling optical fibers to optoelectronic components
47 7,440,531 Dynamic recalibration mechanism for elastic interface
48 7,440,468 Queue management of a global link control byte in an input/output subsystem
49 7,440,453 Determining availability of a destination for computer network communications
50 7,440,419 Methods for detecting nagling on a TCP network connection
51 7,440,417 Method and system for frame and protocol classification
52 7,440,353 Floating body control in SOI DRAM
53 7,440,348 Memory array having a redundant memory element
54 7,440,155 Mass-balanced actuating mechanism for a micro scanning device
55 7,440,118 Apparatus and method for color filter inspection
56 7,440,083 Printing a mask with maximum possible process window through adjustment of the source distribution
57 7,439,975 Method and system for producing dynamically determined drop shadows in a three-dimensional graphical user interface
58 7,439,973 Ray tracing with depth buffered display
59 7,439,957 Compact universal keyboard
60 7,439,956 Ergonomic computer alignment
61 7,439,864 Method for automatic RFID attenuation and recovery
62 7,439,755 Electronic circuit for measurement of transistor variability and the like
63 7,439,724 On-chip jitter measurement circuit
64 7,439,628 Method for improved process latitude by elongated via integration
65 7,439,624 Enhanced mechanical strength via contacts
66 7,439,607 Beta control using a rapid thermal oxidation
67 7,439,568 Vertical body-contacted SOI transistor
68 7,439,561 Pixel sensor cell for collecting electrons and holes
69 7,439,559 SOI device with different crystallographic orientations
70 7,439,542 Hybrid orientation CMOS with partial insulation process
71 7,439,302 Low refractive index polymers as underlayers for silicon-containing photoresists
72 7,439,180 Dispenser system for atomic beam assisted metal organic chemical vapor deposition (MOCVD)
73 7,439,174 Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics
74 7,439,173 Increasing electromigration lifetime and current density in IC using vertically upwardly extending dummy via
75 7,439,172 Circuit structure with low dielectric constant regions and method of forming same
76 7,439,170 Design structure for final via designs for chip stress reduction
77 7,439,151 Method and structure for integrating MIM capacitors within dual damascene processing techniques
78 7,439,149 Structure and method for forming SOI trench memory with single-sided strap
79 7,439,145 Tunable semiconductor diodes
80 7,439,144 CMOS gate structures fabricated by selective oxidation
81 7,439,135 Self-aligned body contact for a semiconductor-on-insulator trench device and method of fabricating same
82 7,439,128 Method of creating deep trench capacitor using a P+ metal electrode
83 7,439,123 Low resistance contact semiconductor device structure
84 7,439,110 Strained HOT (hybrid orientation technology) MOSFETs
85 7,439,109 Method of forming an integrated circuit structure on a hybrid crystal oriented substrate
86 7,439,108 Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same
87 7,439,081 Method for making integrated circuit chip utilizing oriented carbon nanotube conductive layers
88 7,439,001 Focus blur measurement and control method
89 7,438,822 Apparatus and method for shielding a wafer from charged particles during plasma etching
90 7,438,597 EMC clamp for three exit backshell
91 7,438,577 Method of locking and activating a hot swappable daughter card
92 7,438,571 Multiple location latch mechanism with single actuation
93 7,438,558 Three-dimensional stackable die configuration for an electronic circuit board
94 7,438,557 Stacked multiple electronic component interconnect structure
95 7,438,229 Combined magnetic shield member and pressure pad for a magnetic reader
96 7,438,227 System and method to determine the prices and order quantities that maximize a retailer’s total profit
97 7,437,915 Probe for scanning over a substrate and a data storage device