24 US patent applications published on 21 June 2007 and assigned to Intel
1 | 20070143755 | Speculative execution past a barrier |
2 | 20070143746 | Method and system for efficient range and stride checking |
3 | 20070143732 | Pixelated masks for high resolution photolithography |
4 | 20070143637 | Power saving techniques for use in communication systems, networks, and devices |
5 | 20070143568 | Address scrambing to simplify memory controller’s address output multiplexer |
6 | 20070143550 | Per-set relaxation of cache inclusion |
7 | 20070143549 | System and method for reducing store latency |
8 | 20070143546 | Partitioned shared cache |
9 | 20070142954 | Method and apparatus for automated processing by upfront specification of process parameters |
10 | 20070142947 | Mechanism for execution of global flow changes in a manufacturing system |
11 | 20070142003 | Method and apparatus for measuring and compensating for power amplifier distortion and non-linearity |
12 | 20070141826 | Filling narrow and high aspect ratio openings using electroless deposition |
13 | 20070141798 | Silicide layers in contacts for high-k/metal gate transistors |
14 | 20070141714 | Method to detect small molecules binding to proteins using surface enhanced Raman scattering (SERS) |
15 | 20070140030 | Apparatus and method for thermal management of a memory device |
16 | 20070139777 | Reconfigurable zone plate lens |
17 | 20070139445 | Method and apparatus for displaying rotated images |
18 | 20070139070 | Buffer having predriver to help improve symmetry of rise and fall transitions in an output signal |
19 | 20070138623 | Carbon nanotube micro-chimney and thermo siphon die-level cooling |
20 | 20070138621 | Low temperature phase change thermal interface material dam |
21 | 20070138611 | Device package |
22 | 20070138565 | Extreme high mobility CMOS logic |
23 | 20070138559 | Replacement gates to enhance transistor strain |
24 | 20070138299 | Transaction card supporting multiple transaction types |