43 US patents granted on 03 August 2010 and assigned to Intel
| 1 | 7,770,162 | Statement shifting to increase parallelism of loops |
| 2 | 7,770,088 | Techniques to transmit network protocol units |
| 3 | 7,770,051 | Strategy to verify asynchronous links across chips |
| 4 | 7,770,034 | Performance monitoring based dynamic voltage and frequency scaling |
| 5 | 7,770,030 | Content guard system for copy protection of recordable media |
| 6 | 7,770,005 | Launching a secure kernel in a multiprocessor system |
| 7 | 7,770,003 | Updating firmware securely over a network |
| 8 | 7,769,964 | Technique to perform memory reference filtering |
| 9 | 7,769,956 | Pre-coherence channel |
| 10 | 7,769,947 | Management of data redundancy based on power availability in mobile computer systems |
| 11 | 7,769,938 | Processor selection for an interrupt identifying a processor cluster |
| 12 | 7,769,924 | Method and system for low latency audio-visual transport |
| 13 | 7,769,918 | Apparatus and method for high performance volatile disk drive memory access using an integrated DMA engine |
| 14 | 7,769,883 | Communicating message request transaction types between agents in a computer system using multiple message groups |
| 15 | 7,769,868 | Method and system for assigning client requests to a server |
| 16 | 7,769,856 | Automatic tuning of communication protocol performance |
| 17 | 7,769,836 | Method and apparatus for removable device modification of system configuration |
| 18 | 7,769,109 | Method and apparatus to perform modulation using integer timing relationships between intra symbol modulation components |
| 19 | 7,769,107 | Semi-blind analog beamforming for multiple-antenna systems |
| 20 | 7,769,097 | Methods and apparatus to control transmission of a multicarrier wireless communication channel through multiple antennas |
| 21 | 7,769,048 | Link and lane level packetization scheme of encoding in serial links |
| 22 | 7,769,026 | Efficient sort scheme for a hierarchical scheduler |
| 23 | 7,769,002 | Constrained dynamic path selection among multiple communication interfaces |
| 24 | 7,768,988 | Method and apparatus to perform network medium reservation in a wireless network |
| 25 | 7,768,971 | Central frequency modification without communication disruption |
| 26 | 7,768,958 | Flexible architecture for wireless communication networks |
| 27 | 7,768,911 | Platform-based method and apparatus for containing worms using multi-timescale heuristics |
| 28 | 7,768,817 | VCC control inside data register of memory device |
| 29 | 7,768,518 | Enabling multiple instruction stream/multiple data stream extensions on microprocessors |
| 30 | 7,768,508 | Convertible display |
| 31 | 7,768,420 | Operation and control of wireless appliance networks |
| 32 | 7,768,126 | Barrier formation and structure to use in semiconductor devices |
| 33 | 7,768,079 | Transistors with high-k dielectric spacer liner to mitigate lateral oxide encroachement |
| 34 | 7,768,074 | Dual salicide integration for salicide through trench contacts and structures formed thereby |
| 35 | 7,767,563 | Method of forming a silicide layer on a thinned silicon wafer, and related semiconducting structure |
| 36 | 7,767,560 | Three dimensional strained quantum wells and three dimensional strained surface channels by Ge confinement method |
| 37 | 7,767,519 | One transistor/one capacitor dynamic random access memory (1T/1C DRAM) cell |
| 38 | 7,767,509 | Methods of forming a multilayer capping film to minimize differential heating in anneal processes |
| 39 | 7,767,486 | High-volume on-wafer heterogeneous packaging of optical interconnects |
| 40 | 7,767,025 | Nozzle array configuration to facilitate deflux process improvement in chip attach process |
| 41 | 7,766,691 | Land grid array (LGA) socket loading mechanism for mobile platforms |
| 42 | 7,765,825 | Apparatus and method for thermal management of a memory device |
| 43 | 7,765,691 | Method and apparatus for a printed circuit board using laser assisted metallization and patterning of a substrate |
