Intel patents granted on 03 May 2016

55 US patents granted on 03 May 2016 and assigned to Intel

1 9,332,643 Interconnect architecture with stacked flex cable
2 9,332,564 Method, apparatus and system to manage distributed channel access with time reservation
3 9,332,551 Opportunistic resource sharing between devices
4 9,332,469 Frequency offset measurement enhancements for long term evolution (LTE)
5 9,332,456 Discontinuous reception (DRX) enhancements in LTE systems
6 9,332,452 Radio communication devices and methods for controlling a radio communication device
7 9,332,451 Method and apparatus of requesting a beacon report
8 9,332,417 Apparatuses and methods for coordinating operations of multiple wireless communications modules with multiple subscriber numbers
9 9,332,381 Location-based application recommendation
10 9,332,264 Configurable performance motion estimation for video encoding
11 9,331,935 Network device selection
12 9,331,855 Apparatus, system, and method for providing attribute identity control associated with a processor
13 9,331,814 Hybrid automatic repeat-request combination for wireless transmissions
14 9,331,795 Transmission arrangement and method for analyzing an amplified transmission signal
15 9,331,759 HARQ timing design for a TDD system
16 9,331,722 Feedback calibration of digital to time converter
17 9,331,674 Multi-phase signal generator and multi-phase signal generating method thereof
18 9,331,017 Chip package incorporating interfacial adhesion through conductor sputtering
19 9,330,999 Multi-component integrated heat spreader for multi-chip packages
20 9,330,993 Methods of promoting adhesion between underfill and conductive bumps and structures formed thereby
21 9,330,963 Conformal low temperature hermetic dielectric diffusion barriers
22 9,330,827 Method of manufacturing inductors for integrated circuit packages
23 9,330,784 Dynamic window to improve NAND endurance
24 9,330,747 Non-volatile latch using spin-transfer torque memory device
25 9,330,734 Method and apparatus for dynamically adjusting voltage reference to optimize an I/O system
26 9,330,718 Techniques for adding interactive features to videos
27 9,330,483 Avatar facial expression techniques
28 9,330,478 Augmented reality creation using a real scene
29 9,330,470 Method and system for modeling subjects from a depth map
30 9,330,433 Data distribution fabric in scalable GPUs
31 9,330,394 Content management with hierarchical content rules
32 9,330,379 Providing notifications of messages for consumption
33 9,330,363 Method and article of manufacture for ensuring fair access to information using propagation delays to determine when to release object locks
34 9,330,322 Controlled access to functionality of a wireless device
35 9,330,112 Grouping and compressing similar photos
36 9,330,039 Crosstalk aware encoding for a data bus
37 9,330,028 Instruction and logic for a binary translation mechanism for control-flow security
38 9,330,027 Register access white listing
39 9,330,022 Power logic for memory address conversion
40 9,330,021 Synchronizing a translation lookaside buffer with an extended paging table
41 9,330,020 System, apparatus, and method for transparent page level instruction translation
42 9,329,974 Technologies for determining binary loop trip count using dynamic binary instrumentation
43 9,329,936 Redundant execution for reliability in a super FMA ALU
44 9,329,918 Resilient register file circuit for dynamic variation tolerance and method of operating the same
45 9,329,900 Hetergeneous processor apparatus and method
46 9,329,884 Managing generated trace data for a virtual machine
47 9,329,865 Context control and parameter passing within microcode based instruction routines
48 9,329,862 SIMD sign operation
49 9,329,848 Mechanism for facilitating dynamic and efficient fusion of computing instructions in software programs
50 9,329,834 Intelligent parametric scratchap memory architecture
51 9,329,684 Eye tracking with detection of adequacy of lighting
52 9,329,668 Apparatus and method for selectively disabling one or more analog circuits of a processor during a low power state of the processor
53 9,329,658 Block-level sleep logic
54 9,329,656 Apparatus, method, and system for predicitve power delivery noise reduction
55 9,329,655 Power management for data ports