Intel patents granted on 08 December 2015

61 US patents granted on 08 December 2015 and assigned to Intel

1 9,210,809 Reduced PTH pad for enabling core routing and substrate layer count reduction
2 9,210,709 Spatial multiplexing in a cellular network
3 9,210,648 Multiple mode support in a wireless local area network
4 9,210,592 Coordinated multipoint (CoMP) interference noise estimation
5 9,210,550 Network vetting of wireless mobile device initiated disconnect
6 9,210,532 Changing the machine-to-machine (M2M) group of an M2M device
7 9,210,526 Audio localization techniques for visual effects
8 9,210,148 Trusted application migration across computer nodes
9 9,210,068 Modifying system routing information in link based systems
10 9,210,039 Generating and/or receiving at least one packet to facilitate, at least in part, network path establishment
11 9,210,024 Methods and arrangements for channel updates in wireless networks
12 9,210,021 Techniques to manage dwell times for pilot rotation
13 9,210,012 Frequency-domain turbo equalization, including multi-mode adaptive linear equalization, adaptive decision-directed channel estimation, adaptive noise variance estimation, and dynamic iteration control
14 9,210,011 Push-pull source-series terminated transmitter apparatus and method
15 9,210,009 Digital pre-distortion filter system and method
16 9,210,006 Method for processing a data signal and receiver circuit
17 9,209,958 Segmented digital-to-time converter calibration
18 9,209,872 MU-MIMO access point and user station including methods for multi-user group management
19 9,209,821 Apparatus for generating quadrature clock phases from a single-ended odd-stage ring oscillator
20 9,209,820 Apparatus for symmetric and linear time-to-digital converter (TDC)
21 9,209,604 Hybrid laser including anti-resonant waveguides
22 9,209,369 Edge coupling alignment using embedded features
23 9,209,290 III-N material structure for gate-recessed transistors
24 9,209,288 Reduced scale resonant tunneling field effect transistor
25 9,209,199 Stacked thin channels for boost and leakage improvement
26 9,209,143 Die edge side connection
27 9,209,136 Hybrid carbon-metal interconnect structures
28 9,209,077 Diagonal hardmasks for improved overlay in fabricating back end of line (BEOL) interconnects
29 9,208,888 Techniques for improving reliability and performance of partially written memory blocks in modern flash memory systems
30 9,208,881 NAND memory array with mismatched cell and bitline pitch
31 9,208,860 SRAM bit-line and write assist apparatus and method for lowering dynamic power and peak current, and a dual input level-shifter
32 9,208,853 Dual-port static random access memory (SRAM)
33 9,208,602 Techniques and architecture for improved vertex processing
34 9,208,575 Method and device for detecting face, and non-transitory computer-readable recording medium for executing the method
35 9,208,375 Face recognition mechanism
36 9,208,359 Always-available embedded theft reaction subsystem
37 9,208,354 Techniques for securing use of one-time passwords
38 9,208,302 Multi-factor authentication using biometric data
39 9,208,299 Secure user authentication with improved one-time-passcode verification
40 9,208,292 Entering a secured computing environment using multiple authenticated code modules
41 9,208,124 Reset of processing core in multi-core processing system
42 9,208,121 High performance interconnect physical layer
43 9,208,110 Raw memory transaction support
44 9,208,022 Techniques for adaptive moving read references for memory cell read error recovery
45 9,207,994 Scheduling tasks among processor cores
46 9,207,988 Method, system, and device for managing server hardware resources in a cloud scheduling environment
47 9,207,945 Multi-persona computing based on real time user recognition
48 9,207,942 Systems, apparatuses,and methods for zeroing of bits in a data element
49 9,207,941 Systems, apparatuses, and methods for reducing the number of short integer multiplications
50 9,207,940 Robust and high performance instructions for system call
51 9,207,910 Digital signal processor having instruction set with an x.sup.K function using reduced look-up table
52 9,207,880 Processor with architecturally-visible programmable on-die storage to store data that is accessible by instruction
53 9,207,753 Multiple-queue multiple-resource entry sleep and wakeup for power savings and bandwidth conservation in a retry based pipeline
54 9,207,750 Apparatus and method for reducing leakage power of a circuit
55 9,207,749 Mechanism for facilitating efficient operations paths for storage devices in computing systems
56 9,207,274 Direct liquid-contact micro-channel heat transfer devices, methods of temperature control for semiconductive devices, and processes of forming same
57 9,207,258 Composite wire probes for testing integrated circuits
58 9,206,523 Nanomachined structures for porous electrochemical capacitors
59 9,205,744 PC-based automobile owner’s manual, diagnostics, and auto care
60 9,205,340 Stowable expanding controller for a mobile gaming device, apparatus and system
61 9,204,814 Hand-held heart monitor