23 US patents granted on 10 March 2015 and assigned to Intel
| 1 | D724,025 | Wireless charging device |
| 2 | 8,978,135 | Methods and apparatus to protect memory regions during low-power states |
| 3 | 8,977,972 | Using multi-modal input to control multiple objects on a display |
| 4 | 8,977,945 | Techniques for transmitting video content to a wirelessly docked device having a display |
| 5 | 8,977,871 | System and method for power management using a basic input output system |
| 6 | 8,977,811 | Scalable schedulers for memory controllers |
| 7 | 8,977,789 | Device connect detection |
| 8 | 8,977,788 | Observing an internal link via an existing port for system on chip devices |
| 9 | 8,977,784 | Port teaming |
| 10 | 8,977,772 | Method and system for facilitating one-to-many data transmissions with reduced network overhead |
| 11 | 8,977,307 | Beamforming coordination in heterogeneous networks |
| 12 | 8,977,273 | Method for selecting a mobile radio area, mobile radio communication device, method for transmitting signals into a mobile radio area, and mobile radio network unit |
| 13 | 8,977,271 | Computer-aided mapping of system information medium access control protocol messages |
| 14 | 8,977,258 | System and method for communicating with fixed and mobile subscriber stations in broadband wireless access networks |
| 15 | 8,977,254 | Method for device configuration, database, mobile communication device and network entity |
| 16 | 8,976,904 | Automated erasure slicer threshold control and modification of symbol estimates to be erased |
| 17 | 8,976,877 | Techniques for multi-user MIMO sounding in wireless networks |
| 18 | 8,976,855 | Power and area efficient receiver equalization architecture with relaxed DFE timing constraint |
| 19 | 8,976,768 | Peer setup of predefined modulation transmission |
| 20 | 8,976,081 | Integration of displays |
| 21 | 8,975,975 | Spread spectrum clocking method for wireless mobile platforms |
| 22 | 8,975,177 | Laser resist removal for integrated circuit (IC) packaging |
| 23 | 8,975,138 | Method of creating a maskless air gap in back end interconnects with double self-aligned vias |
