Intel patents granted on 14 October 2008

44 US patents granted on 14 October 2008 and assigned to Intel

1 7,437,738 Method, system, and program for interfacing with a network adaptor supporting a plurality of devices
2 7,437,724 Registers for data transfers
3 7,437,719 Combinational approach for developing building blocks of DSP compiler
4 7,437,666 Expression grouping and evaluation
5 7,437,643 Automated BIST execution scheme for a link
6 7,437,634 Test scan cells
7 7,437,613 Protecting an operating system kernel from third party drivers
8 7,437,581 Method and apparatus for varying energy per instruction according to the amount of available parallelism
9 7,437,546 Multiple, cooperating operating systems (OS) platform system and method
10 7,437,542 Identifying and processing essential and non-essential code separately
11 7,437,531 Testing memories
12 7,437,518 Hiding conflict, coherence completion and transaction ID elements of a coherence protocol
13 7,437,510 Instruction-assisted cache management for efficient use of cache and memory
14 7,437,503 Method and apparatus for handling data transfers
15 7,437,501 Combining the address-mapping and page-referencing steps in a memory controller
16 7,437,499 Dividing a flash memory operation into phases
17 7,437,474 Proxy-less packet routing between private and public address realms
18 7,437,398 Pattern matching architecture
19 7,437,396 Apparatus and method for generating transforms
20 7,437,286 Voice barge-in in telephony speech recognition
21 7,437,270 Performance state management
22 7,437,134 Tuner arrangement
23 7,437,133 Radio frequency tuner front end and tuner
24 7,437,026 Three dimensional semiconductor based optical switching device
25 7,436,903 Multicarrier transmitter and method for transmitting multiple data streams with cyclic delay diversity
26 7,436,867 Hermetically sealed external cavity laser system and method
27 7,436,846 Network device architecture and associated methods
28 7,436,829 Methods and apparatus for reconfiguring packets to have varying sizes and latencies
29 7,436,727 Method and apparatus to control a power consumption of a memory device
30 7,436,411 Apparatus and method for rendering a video image as a texture using multiple levels of resolution of the video image
31 7,436,277 Power transformer
32 7,436,220 Partially gated mux-latch keeper
33 7,436,215 Transmitter
34 7,436,193 Thin film probe card contact drive system
35 7,436,058 Reactive solder material
36 7,436,035 Method of fabricating a field effect transistor structure with abrupt source/drain junctions
37 7,435,987 Forming a type I heterostructure in a group IV semiconductor
38 7,435,683 Apparatus and method for selectively recessing spacers on multi-gate devices
39 7,435,679 Alloyed underlayer for microelectronic interconnects
40 7,435,675 Method of providing a pre-patterned high-k dielectric film
41 7,435,664 Wafer-level bonding for mechanically reinforced ultra-thin die
42 7,435,637 Quantum wire gate device and method of making same
43 7,435,623 Integrated micro channels and manifold/plenum using separate silicon or low-cost polycrystalline silicon
44 7,434,306 Integrated transformer