Intel patents granted on 16 August 2016

67 US patents granted on 16 August 2016 and assigned to Intel

1 9,420,707 Substrate for integrated circuit devices including multi-layer glass core and methods of making the same
2 9,420,700 Inclined photonic chip package for integrated optical transceivers and optical touchscreen assemblies
3 9,420,693 Integration of embedded thin film capacitors in package substrates
4 9,420,634 User equipment having virtual mobile terminals
5 9,420,627 Systems, methods, and devices with different radio link failure timers based on user equipment speed
6 9,420,537 Queueing mechanism for client-side network traffic to reduce radio power consumption on mobile clients
7 9,420,532 Shaping data packet traffic
8 9,420,511 Signaling QoS requirements and UE power preference in LTE-A networks
9 9,420,475 Radio communication devices and methods for controlling a radio communication device
10 9,420,464 Technologies for controlling network access based on electronic device communication fingerprints
11 9,420,429 Techniques for trusted location application and location provider communications
12 9,419,976 Method and apparatus to using storage devices to implement digital rights management protection
13 9,419,973 Content URL authentication for dash
14 9,419,972 Two dimensional direct memory access scheme for enhanced network protocol processing performance
15 9,419,830 Device, system and method of communicating a wireless communication orthogonal-frequency-division-multiplexing signal
16 9,419,829 Apparatus, system and method of direct current (DC) estimation of a wireless communication packet
17 9,419,802 Secure message filtering to vehicle electronic control units with secure provisioning of message filtering rules
18 9,419,792 Instruction for accelerating SNOW 3G wireless security algorithm
19 9,419,732 Systems and methods for optimized decoding of in-band on-channel (IBOC) services
20 9,419,694 Beamforming using base and differential codebooks
21 9,419,677 Removal of modulated tonal interference
22 9,419,657 Hybrid I/Q and polar transmitter
23 9,419,656 Decoder and method for decoding an encoded sequence of bits
24 9,419,648 Supporting data compression using match scoring
25 9,419,647 Partitioned data compression using accelerator
26 9,419,339 Package structures including discrete antennas assembled on a device
27 9,419,212 Barrier film techniques and configurations for phase-change memory elements
28 9,419,140 Two-dimensional condensation for uniaxially strained semiconductor fins
29 9,419,106 Non-planar transistors and methods of fabrication thereof
30 9,418,997 Floating body memory cell having gates favoring different conductivity type regions
31 9,418,912 Methods of forming serpentine thermal interface material and structures formed thereby
32 9,418,906 Space and cost efficient incorporation of specialized input-output pins on integrated circuit substrates
33 9,418,898 Integrated circuits with selective gate electrode recess
34 9,418,888 Non-lithographically patterned directed self assembly alignment promotion layers
35 9,418,783 Inductor design with metal dummy features
36 9,418,761 Apparatus for boosting source-line voltage to reduce leakage in resistive memories
37 9,418,759 Assist circuits for SRAM testing
38 9,418,752 Ramping inhibit voltage during memory programming
39 9,418,723 Techniques to reduce memory cell refreshes for a memory device
40 9,418,700 Bad block management mechanism
41 9,418,625 Resolution loss mitigation for 3D displays
42 9,418,529 Methods and arrangements for sensors
43 9,418,471 Compact depth plane representation for sort last architectures
44 9,418,438 Networked capture and 3D display of localized, segmented images
45 9,418,390 Determining and communicating user’s emotional state related to user’s physiological and non-physiological data
46 9,418,352 Image-augmented inventory management and wayfinding
47 9,418,035 High performance interconnect physical layer
48 9,418,030 Inter-component communication including posted and non-posted transactions
49 9,418,024 Apparatus and method for efficient handling of critical chunks
50 9,418,016 Method and apparatus for optimizing the usage of cache memories
51 9,418,013 Selective prefetching for a sectored cache
52 9,418,011 Region based technique for accurately predicting memory accesses
53 9,418,009 Inclusive and non-inclusive tracking of local cache lines to avoid near memory reads on cache line memory writes into a two level system memory
54 9,418,000 Dynamically compensating for degradation of a non-volatile memory device
55 9,417,880 Instruction for performing an overload check
56 9,417,879 Systems and methods for managing reconfigurable processor cores
57 9,417,873 Apparatus and method for a hybrid latency-throughput processor
58 9,417,855 Instruction and logic to perform dynamic binary translation
59 9,417,847 Low depth combinational finite field multiplier
60 9,417,821 Presentation of direct accessed storage under a logical drive model
61 9,417,801 Virtual general-purpose I/O controller
62 9,417,726 Supporting keyboard and mouse over embedded displayport without using a universal serial bus
63 9,417,684 Mechanism for facilitating power and performance management of non-volatile memory in computing devices
64 9,417,681 Mechanism to provide workload and configuration-aware deterministic performance for microprocessors
65 9,417,676 Individual core voltage margining
66 9,417,654 Method and apparatus for hardware-assisted secure real time clock management
67 9,417,450 Projection apparatus using telecentric optics