Intel patents granted on 16 January 2007

27 US patents granted on 16 January 2007 and assigned to Intel

1 7,165,245 Pruning local graphs in an inter-procedural analysis solver
2 7,165,195 Method, system, and apparatus for bit error capture and analysis for serial interfaces
3 7,165,181 System and method for establishing trust without revealing identity
4 7,165,170 System and method for firmware to export pre-boot data into the operating system runtime environment
5 7,165,165 Anticipatory power control of memory
6 7,165,164 Method and apparatus including heuristic for sharing TLB entries
7 7,165,161 Methods and apparatus for balancing memory access latency and bandwidth
8 7,165,153 Memory channel with unidirectional links
9 7,165,144 Managing input/output (I/O) requests in a cache memory system
10 7,165,134 System for selectively generating real-time interrupts and selectively processing associated data when it has higher priority than currently executing non-real-time operation
11 7,165,131 Separating transactions into different virtual channels
12 7,165,095 Method and apparatus for distributing large payload file to a plurality of storage devices in a network
13 7,165,029 Coupled hidden Markov model for audiovisual speech recognition
14 7,164,742 Deskew architecture
15 7,164,721 Simultaneous bidirectional signal subtraction
16 7,164,678 Control of processing order for received network packets
17 7,164,675 Telephony data to host streaming via a computer interface
18 7,164,616 Memory array leakage reduction circuit and method
19 7,164,585 Thermal interface apparatus, systems, and methods
20 7,164,580 Plenum-based computer cooling system
21 7,164,478 Apparatus and methods for stabilization and control of fiber devices and fiber devices including the same
22 7,164,427 Apparatus, method and system with a graphics-rendering engine having a time allocator
23 7,164,307 Bias generator for body bias
24 7,164,222 Film bulk acoustic resonator (FBAR) with high thermal conductivity
25 7,164,206 Structure in a microelectronic device including a bi-layer for a diffusion barrier and an etch-stop layer
26 7,164,166 Memory circuit with spacers between ferroelectric layer and electrodes
27 7,162,810 Micro tool alignment apparatus and method