30 US patents granted on 17 August 2010 and assigned to Intel
| 1 | 7,779,451 | Securing wakeup network events |
| 2 | 7,779,305 | Method and system for recovery from an error in a computing device by transferring control from a virtual machine monitor to separate firmware instructions |
| 3 | 7,779,294 | Power-safe disk storage apparatus, systems, and methods |
| 4 | 7,779,287 | Reducing power consumption in multiprocessor systems |
| 5 | 7,779,282 | Maintaining network connectivity while operating in low power mode |
| 6 | 7,779,244 | Multi-socket boot |
| 7 | 7,779,243 | Dual operating system computing system |
| 8 | 7,779,239 | User opt-in processor feature control capability |
| 9 | 7,779,211 | Reducing latency in responding to a snoop request |
| 10 | 7,779,210 | Avoiding snoop response dependency |
| 11 | 7,779,193 | Method and apparatus for external data transfer in a personal storage device |
| 12 | 7,779,188 | System and method to reduce memory latency in microprocessor systems connected with a bus |
| 13 | 7,779,178 | Method and apparatus for application/OS triggered low-latency network communications |
| 14 | 7,778,838 | Apparatus, system and method for buffering audio data to allow low power states in a processing system during audio playback |
| 15 | 7,778,826 | Beamforming codebook generation system and associated methods |
| 16 | 7,778,817 | Method and apparatus for determining text passage similarity |
| 17 | 7,778,657 | Method and apparatus to perform power control in a wireless network |
| 18 | 7,778,599 | Aggregated channel feedback |
| 19 | 7,778,334 | Modulation scheme for communication environments |
| 20 | 7,778,226 | Device, system and method of coordination among multiple transceivers |
| 21 | 7,778,166 | Synchronizing sequence numbers among peers in a network |
| 22 | 7,777,544 | System and method to detect order and linearity of signals |
| 23 | 7,777,507 | Integrated circuit testing with laser stimulation and emission analysis |
| 24 | 7,777,282 | Self-aligned tunneling pocket in field-effect transistors and processes to form same |
| 25 | 7,776,734 | Barrier layer for fine-pitch mask-based substrate bumping |
| 26 | 7,776,729 | Transistor, method of manufacturing same, etchant for use during manufacture of same, and system containing same |
| 27 | 7,776,684 | Increasing the surface area of a memory cell capacitor |
| 28 | 7,776,657 | Chip package thermal interface materials with dielectric obstructions for body-biasing, methods of using same, and systems containing same |
| 29 | 7,776,651 | Method for compensating for CTE mismatch using phase change lead-free super plastic solders |
| 30 | 7,776,547 | Cellular analysis using Raman surface scanning |
