Intel patents granted on 19 February 2008

42 US patents granted on 19 February 2008 and assigned to Intel

1 7,334,158 Power fault handling method, apparatus, and system
2 7,334,148 Optimization of integrated circuit device I/O bus timing
3 7,334,145 Predictive processor speed governor
4 7,334,120 Firmware emulation environment for developing, debugging, and testing firmware components including option ROMs
5 7,334,115 Detection, recovery and prevention of bogus branches
6 7,334,107 Caching support for direct memory access address translation
7 7,334,082 Method and system to change a power state of a hard drive
8 7,334,075 Managing transmissions between devices
9 7,334,012 Reverse division process
10 7,333,695 Singulated dies in a parallel optics module
11 7,333,558 Digitally pre-equalizing signals
12 7,333,556 System and method for selecting data rates to provide uniform bit loading of subcarriers of a multicarrier communication channel
13 7,333,555 Device, system and method for wireless combined-signal communication
14 7,333,526 Coarse spectrometer with a grating
15 7,333,502 Services processor having a queue operations unit and an output scheduler
16 7,333,490 Table driven programming system for a services processor
17 7,333,484 Services processor having a packet editing unit
18 7,333,466 Reduced complexity MMSE multiuser detection for a multirate CDMA link
19 7,333,433 Managing bandwidth using weighted reduction
20 7,333,423 Transceiver with calibrated I and Q paths and methods for deconvolved calibration
21 7,333,335 Using the wave soldering process to attach motherboard chipset heat sinks
22 7,333,102 Self-configured display power supply
23 7,332,964 Gain-step transconductor
24 7,332,947 Method and apparatus for distorting duty cycle of a clock
25 7,332,937 Dynamic logic with adaptive keeper
26 7,332,893 Battery pack with internal charge/power switching
27 7,332,823 Providing a metal layer in a semiconductor package
28 7,332,817 Die and die-package interface metallization and bump design and arrangement
29 7,332,807 Chip package thermal interface materials with dielectric obstructions for body-biasing, methods of using same, and systems containing same
30 7,332,801 Electronic device
31 7,332,797 Wire-bonded package with electrically insulating wire encapsulant and thermally conductive overmold
32 7,332,792 Magnetic layer processing
33 7,332,779 Memory with split gate devices and method of fabrication
34 7,332,439 Metal gate transistors with epitaxial source and drain regions
35 7,332,429 Laser ablation and imprinting hybrid processing for fabrication of high density interconnect flip chip substrates
36 7,332,423 Soldering a die to a substrate
37 7,332,416 Methods to manufacture contaminant-gettering materials in the surface of EUV optics
38 7,332,406 Air gap interconnect structure and method
39 7,332,061 Integration of multiple frequency band FBAR filters
40 7,331,503 Solder printing process to reduce void formation in a microvia
41 7,331,500 Solder bumps formation using solder paste with shape retaining attribute
42 7,331,492 Drip resistant dispensing nozzle