Intel patents granted on 21 March 2006

31 US patents granted on 21 March 2006 and assigned to Intel

1 7,017,148 Apparatus and method for UPnP device code generation using XML
2 7,017,075 Recovering from video driver errors
3 7,017,062 Method and apparatus for recovering from an overheated microprocessor
4 7,017,060 Power management system that changes processor level if processor utilization crosses threshold over a period that is different for switching up or down
5 7,017,040 BIOS update file
6 7,017,035 Method and apparatus for using an ACPI NVS memory region as an alternative CMOS information area
7 7,017,017 Memory controllers with interleaved mirrored memory modes
8 7,017,008 Method and apparatus for optimizing data streaming in a computer system utilizing random access memory in a system logic device
9 7,016,990 Mobile computing system having a modem for operation independent of a main processor and method therefor
10 7,016,989 Fast 16 bit, split transaction I/O bus
11 7,016,826 Apparatus and method of developing software for a multi-processor chip
12 7,016,809 Method and system for automatically interpreting computer system performance measurements
13 7,016,553 Linearized data structure ordering images based on their attributes
14 7,016,533 Apparatus and method for imager device color calibration using spectral light source
15 7,016,365 Switching fabric including a plurality of crossbar sections
16 7,016,354 Packet-based clock signal
17 7,016,304 Link level retry scheme
18 7,016,249 Reference voltage generator
19 7,016,239 Leakage tolerant register file
20 7,015,979 Noisy edge removal for video transmission
21 7,015,962 Integrated color interpolation and color space conversion algorithm from 8-bit Bayer pattern RGB color space to 12-bit YCrCb color space
22 7,015,741 Adaptive body bias for clock skew compensation
23 7,015,720 Driver circuit
24 7,015,592 Marking on underfill
25 7,015,108 Implanting carbon to form P-type drain extensions
26 7,015,085 Super self-aligned collector device for mono-and hetero bipolar junction transistors and method of making same
27 7,015,073 Method of forming heat spreader with down set leg attachment feature
28 7,014,956 Active secondary exposure mask to manufacture integrated circuits
29 7,014,488 Socket cover with recessed center and method
30 7,014,093 Multi-layer polymer-solder hybrid thermal interface material for integrated heat spreader and method of making same
31 7,013,562 Method of using micro-contact imprinted features for formation of electrical interconnects for substrates