70 US patents granted on 23 February 2016 and assigned to Intel
| 1 | D750,070 | Wearable computing device |
| 2 | D750,069 | Wearable computing device |
| 3 | 9,271,293 | Bidirectional iterative beam forming |
| 4 | 9,271,278 | RF chain usage in a dual network architecture |
| 5 | 9,271,249 | Association biasing for a heterogeneous network (HetNet) |
| 6 | 9,271,242 | Energy-harvesting devices in wireless networks |
| 7 | 9,271,241 | Access point and methods for distinguishing HEW physical layer packets with backwards compatibility |
| 8 | 9,271,193 | Care-of-address handover |
| 9 | 9,271,174 | Communication device performing measurements using assigned time slots |
| 10 | 9,271,103 | Audio control based on orientation |
| 11 | 9,270,801 | Low power audio trigger via intermittent sampling |
| 12 | 9,270,698 | Filter for network intrusion and virus detection |
| 13 | 9,270,657 | Activation and monetization of features built into storage subsystems using a trusted connect service back end infrastructure |
| 14 | 9,270,643 | State-transition based network intrusion detection |
| 15 | 9,270,576 | Aggregating completion messages in a sideband interface |
| 16 | 9,270,555 | Power mangement techniques for an input/output (I/O) subsystem |
| 17 | 9,270,460 | Instructions to perform JH cryptographic hashing in a 256 bit data path |
| 18 | 9,270,457 | Optimizing security bits in a media access control (MAC) header |
| 19 | 9,270,429 | Method for signaling information by modifying modulation constellations |
| 20 | 9,270,425 | Coordinated interference mitigation and cancelation |
| 21 | 9,270,400 | Determining proximity of user equipment for device-to-device communication |
| 22 | 9,270,386 | Error detecting and correcting structured light patterns |
| 23 | 9,270,339 | Method, apparatus and system of recovering an operating system on a portable communication device |
| 24 | 9,270,326 | Adaptive clock spreading for platform RFI mitigation |
| 25 | 9,270,278 | Spin transfer torque based memory elements for programmable device arrays |
| 26 | 9,269,701 | Localized high density substrate routing |
| 27 | 9,269,686 | Debond interconnect structures |
| 28 | 9,269,676 | Through silicon via guard ring |
| 29 | 9,269,652 | Chemically altered carbosilanes for pore sealing applications |
| 30 | 9,269,630 | Patterning of vertical nanowire transistor channel and gate with directed self assembly |
| 31 | 9,269,596 | Narrow-gap flip chip underfill composition |
| 32 | 9,269,490 | Non-contact power transmission apparatus |
| 33 | 9,269,438 | System and method for intelligently flushing data from a processor into a memory subsystem |
| 34 | 9,269,436 | Techniques for determining victim row addresses in a volatile memory |
| 35 | 9,269,417 | Memory refresh management |
| 36 | 9,269,409 | Bit cell write-assistance |
| 37 | 9,269,180 | Computer graphics processor and method for rendering a three-dimensional image on a display screen |
| 38 | 9,269,121 | Techniques for managing system power using deferred graphics rendering |
| 39 | 9,269,120 | Dynamically rebalancing graphics processor resources |
| 40 | 9,268,995 | Smile detection techniques |
| 41 | 9,268,948 | Secure access enforcement proxy |
| 42 | 9,268,893 | Photolithography mask synthesis for spacer patterning |
| 43 | 9,268,881 | Child state pre-fetch in NFAs |
| 44 | 9,268,742 | Reconfigurable variable length fir filters for optimizing performance of digital repeater |
| 45 | 9,268,731 | Controlling devices via advance notice signaling |
| 46 | 9,268,724 | Configuration of data strobes |
| 47 | 9,268,723 | Dram compression scheme to reduce power consumption in motion compensation and display refresh |
| 48 | 9,268,712 | Method, system and apparatus for region access control |
| 49 | 9,268,707 | Low overhead paged memory runtime protection |
| 50 | 9,268,697 | Snoop filter having centralized translation circuitry and shadow tag array |
| 51 | 9,268,691 | Fast mechanism for accessing 2n.+-.1 interleaved memory system |
| 52 | 9,268,686 | Background reordering–a preventive wear-out control mechanism with limited overhead |
| 53 | 9,268,631 | Adaptive moving read references for memory cells |
| 54 | 9,268,626 | Apparatus and method for vectorization with speculation support |
| 55 | 9,268,611 | Application scheduling in heterogeneous multiprocessor computing platform based on a ratio of predicted performance of processor cores |
| 56 | 9,268,596 | Instruction and logic to test transactional execution status |
| 57 | 9,268,595 | Scheduling thread execution based on thread affinity |
| 58 | 9,268,594 | Processor extensions for execution of secure embedded containers |
| 59 | 9,268,570 | DFA compression and execution |
| 60 | 9,268,568 | Method and apparatus for agent interfacing with pipeline backbone to locally handle transactions while obeying ordering rule |
| 61 | 9,268,567 | Instruction and logic for boyer-moore search of text strings |
| 62 | 9,268,565 | Method and apparatus for performing logical compare operations |
| 63 | 9,268,564 | Vector and scalar based modular exponentiation |
| 64 | 9,268,545 | Connecting mobile devices, internet-connected hosts, and cloud services |
| 65 | 9,268,541 | Methods and systems to vectorize scalar computer program loops having loop-carried dependences |
| 66 | 9,268,393 | Enforcing a power consumption duty cycle in a processor |
| 67 | 9,268,378 | Techniques and system for managing platform temperature |
| 68 | 9,268,377 | Electronic device having a passive heat exchange device |
| 69 | 9,267,944 | Biosensor utilizing a resonator having a functionalized surface |
| 70 | 9,266,723 | Misalignment correction for embedded microelectronic die applications |
