24 US patents granted on 24 January 2006 and assigned to Intel
1 | 6,990,621 | Enabling at speed application of test patterns associated with a wide tester interface on a low pin count tester |
2 | 6,990,579 | Platform and method for remote attestation of a platform |
3 | 6,990,577 | Updating a BIOS image by replacing a portion of the BIOS image with a portion of another BIOS image |
4 | 6,990,571 | Method for memory optimization in a digital signal processor |
5 | 6,990,564 | Method and apparatus for segmenting memory based upon bandwidth of a data communication platform |
6 | 6,990,551 | System and method for employing a process identifier to minimize aliasing in a linear-addressed cache |
7 | 6,990,542 | Implementing hardware interrupt event driven mechanism to offer soft real-time universal serial bus |
8 | 6,990,412 | Techniques to manufacture optical signal transmitters |
9 | 6,990,387 | Test system for identification and sorting of integrated circuit devices |
10 | 6,990,258 | Optical modulator |
11 | 6,990,183 | Multiple platform voice processing system with optimized resource allocation |
12 | 6,990,084 | Echo cancellation with dynamic latency adjustment |
13 | 6,990,082 | Wireless apparatus having a transceiver equipped to support multiple wireless communication protocols |
14 | 6,990,036 | Method and apparatus for multiple row caches per bank |
15 | 6,990,017 | Accessing phase change memories |
16 | 6,989,897 | Metal coated nanocrystalline silicon as an active surface enhanced Raman spectroscopy (SERS) substrate |
17 | 6,989,838 | Methods, systems, and data structures for generating a rasterizer |
18 | 6,989,695 | Apparatus and method for reducing power consumption by a data synchronizer |
19 | 6,989,586 | Integrated circuit packages with reduced stress on die and associated substrates, assemblies, and systems |
20 | 6,989,484 | Controlling sharing of files by portable devices |
21 | 6,989,284 | Fabrication of a waveguide taper through ion implantation |
22 | 6,988,543 | Annular cold plate with reflexive channels |
23 | 6,988,531 | Micro-chimney and thermosiphon die-level cooling |
24 | 6,988,307 | Method of making an integrated inductor |