Intel patents granted on 29 August 2006

49 US patents granted on 29 August 2006 and assigned to Intel

1 RE39,252 Instruction dependent clock scheme
2 7,100,157 Methods and apparatus to avoid dynamic micro-architectural penalties in an in-order processor
3 7,100,155 Software set-value profiling and code reuse
4 7,100,135 Method and system to evaluate signal line spacing
5 7,100,102 Method and apparatus for performing cyclic redundancy checks
6 7,100,097 Detection of bit errors in maskable content addressable memories
7 7,100,060 Techniques for utilization of asymmetric secondary processing resources
8 7,100,037 Method for reducing BIOS resume time from a sleeping state
9 7,100,033 Controlling the timing of test modes in a multiple processor system
10 7,100,032 Method and apparatus for identifying hardware compatibility and enabling stable software images
11 7,100,029 Performing repeat string operations
12 7,100,027 System and method for reproducing system executions using a replay handler
13 7,100,025 Apparatus and method for performing single-instruction multiple-data instructions
14 7,100,012 Processor and data cache with data storage unit and tag hit/miss logic operated at a first and second clock frequencies
15 7,100,001 Methods and apparatus for cache intervention
16 7,099,998 Method for reducing an importance level of a cache line
17 7,099,985 Using a processor to program a semiconductor memory
18 7,099,968 System and method for generating bus requests in advance based on speculation states
19 7,099,961 System including real-time data communication features
20 7,099,943 Regulating usage of computer resources
21 7,099,794 Method, apparatus, and system for memory read transaction biasing in mirrored mode to provide thermal management
22 7,099,735 Method and apparatus to control the temperature of a memory device
23 7,099,682 Method for allocating resources in a wireless system
24 7,099,679 Method of saving power by reducing active reception time in standby mode
25 7,099,386 Channel tracking using channel covariance estimation
26 7,099,360 Method and apparatus to generate and monitor optical signals and control power levels thereof in a planar lightwave circuit
27 7,099,337 Mechanism for implementing class redirection in a cluster
28 7,099,318 Communicating message request transaction types between agents in a computer system using multiple message groups
29 7,099,219 Multi read port bit line
30 7,099,180 Phase change memory bits reset through a series of pulses of increasing amplitude
31 7,099,139 Integrated circuit package substrate having a thin film capacitor structure
32 7,098,952 Imager having multiple storage locations for each pixel sensor
33 7,098,925 Shading of images using texture
34 7,098,899 Dual form low power, instant on and high performance, non-instant on computing device
35 7,098,787 System and method for signaling emergency responses
36 7,098,766 Magnetic material for transformers and/or inductors
37 7,098,745 System to control integrated circuit resonance
38 7,098,726 Method and apparatus for operating a voltage regulator based on operation of a timer
39 7,098,635 Regulating voltage applied to an integrated circuit and proxy frequency
40 7,098,534 Sacrificial component
41 7,098,507 Floating-body dynamic random access memory and method of fabrication in tri-gate technology
42 7,098,466 Adjustable illumination source
43 7,098,080 Method of making a semiconductor package with integrated heat spreader attached to a thermally conductive substrate core
44 7,098,079 Electronic assembly with high capacity thermal interface and methods of manufacture
45 7,098,047 Wafer reuse techniques
46 7,097,542 Method and apparatus for conditioning a polishing pad
47 7,097,536 Electrically enhanced surface planarization
48 7,097,462 Patch substrate for external connection
49 7,096,580 I/C package/thermal-solution retention mechanism with spring effect