32 US patents granted on 30 May 2006 and assigned to Intel
| 1 | 7,055,165 | Method and apparatus for periodically delivering an optimal batch broadcast schedule based on distributed client feedback |
| 2 | 7,055,153 | Inter-object messaging |
| 3 | 7,055,145 | Dynamic management of execute in place applications |
| 4 | 7,055,060 | On-die mechanism for high-reliability processor |
| 5 | 7,055,024 | Computer system component initialization using a BIOS formal hardware language to represent the initialization requirements |
| 6 | 7,054,999 | High speed DRAM cache architecture |
| 7 | 7,054,974 | System for end of interrupt handling |
| 8 | 7,054,950 | Network thread scheduling |
| 9 | 7,054,944 | Access control management system utilizing network and application layer access control lists |
| 10 | 7,054,796 | Determining a geometric error of a polygon in a subdivision surface |
| 11 | 7,054,720 | Operating system coordinated thermal management |
| 12 | 7,054,706 | Managing supply chains with model predictive control |
| 13 | 7,054,607 | Method and apparatus for reducing DC offset in a wireless receiver |
| 14 | 7,054,479 | Segmenting three-dimensional video images using stereo |
| 15 | 7,054,374 | Differential simultaneous bi-directional receiver |
| 16 | 7,054,331 | Multi-lane receiver de-skewing |
| 17 | 7,054,299 | Method and apparatus of pilot signal synchronization verifier |
| 18 | 7,054,218 | Serial memory address decoding scheme |
| 19 | 7,053,944 | Method of using hue to interpolate color pixel signals |
| 20 | 7,053,938 | Speech-to-text captioning for digital cameras and associated methods |
| 21 | 7,053,894 | Compression of surface light fields |
| 22 | 7,053,716 | Controlled impedance bias circuit |
| 23 | 7,053,663 | Dynamic gate with conditional keeper for soft error rate reduction |
| 24 | 7,053,643 | Radio frequency (RF) test probe |
| 25 | 7,053,496 | Hybrid package with non-insertable and insertable conductive features, complementary receptacle, and methods of fabrication, assembly, and operation therefor |
| 26 | 7,053,491 | Electronic assembly having composite electronic contacts for attaching a package substrate to a printed circuit board |
| 27 | 7,053,481 | High capacitance package substrate |
| 28 | 7,053,466 | High-speed signaling interface with broadside dynamic wave coupling |
| 29 | 7,053,449 | Double gate transistor for low power circuits |
| 30 | 7,052,996 | Electrochemically polishing conductive films on semiconductor wafers |
| 31 | 7,052,978 | Arrangements incorporating laser-induced cleaving |
| 32 | 7,052,225 | Apparatus for handling mass produced work pieces |
