21 US patent applications published on 28 November 2013 and assigned to Micron
1 | 20130318418 | ADAPTIVE ERROR CORRECTION FOR PHASE CHANGE MEMORY |
2 | 20130318298 | MEMORY SYSTEMS AND METHODS FOR CONTROLLING THE TIMING OF RECEIVING READ DATA |
3 | 20130318294 | INTERNAL PROCESSOR BUFFER |
4 | 20130317796 | Simulating the Transmission and Simultaneous Switching Output Noise of Signals in a Computer System |
5 | 20130316153 | Constructions Comprising Rutile-Type Titanium Oxide; And Methods of Forming and Utilizing Rutile-Type Titanium Oxide |
6 | 20130316038 | EPITAXIAL FORMATION SUPPORT STRUCTURES AND ASSOCIATED METHODS |
7 | 20130315002 | METHODS AND DEVICES FOR DETERMINING SENSING VOLTAGES |
8 | 20130315001 | SEMICONDUCTOR MEMORY COLUMN DECODER DEVICE AND METHOD |
9 | 20130315000 | Techniques For Providing A Direct Injection Semiconductor Memory Device |
10 | 20130314993 | PROGRAMMING RATE IDENTIFICATION AND CONTROL IN A SOLID STATE MEMORY |
11 | 20130314986 | Thyristors |
12 | 20130314973 | Memory Cells, Methods of Programming Memory Cells, and Methods of Forming Memory Cells |
13 | 20130314967 | MEMORY HAVING BURIED DIGIT LINES AND METHODS OF MAKING THE SAME |
14 | 20130314140 | ANALOG DELAY LINES AND ADAPTIVE BIASING |
15 | 20130314136 | OUTPUT DRIVER ROBUST TO DATA DEPENDENT NOISE |
16 | 20130314131 | DEVICES INCLUDING PHASE INVERTERS AND PHASE MIXERS |
17 | 20130313718 | Substrates Comprising Integrated Circuitry, Methods Of Processing A Substrate Comprising Integrated Circuitry, And Methods Of Back-Side Thinning A Substrate Comprising Integrated Circuitry |
18 | 20130313710 | Semiconductor Constructions and Methods of Forming Semiconductor Constructions |
19 | 20130313678 | Memory Cells And Methods Of Forming Memory Cells |
20 | 20130313618 | FIN-JFET |
21 | 20130313510 | MEMORY DEVICE HAVING SELF-ALIGNED CELL STRUCTURE |