30 US patents granted on 02 January 2007 and assigned to Micron
1 | 7,159,141 | Repairable block redundancy scheme |
2 | 7,159,092 | Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same |
3 | 7,158,443 | Delay-lock loop and method adapting itself to operate over a wide frequency range |
4 | 7,158,422 | System and method for communicating information to a memory device using a reconfigured device pin |
5 | 7,158,410 | Integrated DRAM-NVRAM multi-level memory |
6 | 7,158,401 | Methods for machine detection of at least one aspect of an object, methods for machine identification of a person, and methods of forming electronic systems |
7 | 7,158,399 | Digital data apparatuses and digital data operational methods |
8 | 7,158,031 | Thin, flexible, RFID label and system for use |
9 | 7,158,004 | Integrated circuit inductors |
10 | 7,157,783 | Platinum stuffed with silicon oxide as a diffusion oxygen barrier for semiconductor devices |
11 | 7,157,778 | Semiconductor constructions |
12 | 7,157,775 | Semiconductor constructions |
13 | 7,157,771 | Vertical device 4F.sup.2 EEPROM memory |
14 | 7,157,769 | Flash memory having a high-permittivity tunnel dielectric |
15 | 7,157,761 | Capacitor with noble metal pattern |
16 | 7,157,757 | Semiconductor constructions |
17 | 7,157,733 | Floating-gate field-effect transistors having doped aluminum oxide dielectrics |
18 | 7,157,683 | Method, apparatus and system providing configurable current source device for image sensors |
19 | 7,157,387 | Techniques to create low K ILD for BEOL |
20 | 7,157,385 | Method of depositing a silicon dioxide-comprising layer in the fabrication of integrated circuitry |
21 | 7,157,364 | Method for forming metal contacts on a substrate |
22 | 7,157,353 | Method for fabricating encapsulated semiconductor components |
23 | 7,157,324 | Transistor structure having reduced transistor leakage attributes |
24 | 7,157,310 | Methods for packaging microfeature devices and microfeature devices formed by such methods |
25 | 7,157,305 | Forming multi-layer memory arrays |
26 | 7,157,302 | Imaging device and method of manufacture |
27 | 7,156,727 | Web-format polishing pads and methods for manufacturing and using web-format polishing pads in mechanical and chemical-mechanical planarization of microelectronic substrates |
28 | 7,156,633 | Apparatus for encapsulating a multi-chip substrate array |
29 | 7,156,362 | Method and apparatus for forming metal contacts on a substrate |
30 | 7,156,361 | Method and apparatus for forming metal contacts on a substrate |