Micron patents granted on 02 May 2006

36 US patents granted on 02 May 2006 and assigned to Micron

1 7,039,751 Programmable cache system
2 7,038,970 Programming and evaluating through PMOS injection
3 7,038,966 Memory device and method having data path with multiple prefetch I/O configurations
4 7,038,958 Dual stage DRAM memory equalization
5 7,038,954 Apparatus with equalizing voltage generation circuit and methods of use
6 7,038,945 Flash memory device with improved programming performance
7 7,038,940 Pulsed write techniques for magneto-resistive memories
8 7,038,927 High speed data bus
9 7,038,762 Method and apparatus for irradiating a microlithographic substrate
10 7,038,679 Three dimensional rendering including motion sorting
11 7,038,521 Voltage level shifting circuit with improved switching speed
12 7,038,511 System and method for comparison and compensation of delay variations between fine delay and coarse delay circuits
13 7,038,481 Method and apparatus for determining burn-in reliability from wafer level burn-in
14 7,038,475 Test method for semiconductor components using conductive polymer contact system
15 7,038,318 Compound structure for reduced contact resistance
16 7,038,315 Semiconductor chip package
17 7,038,286 Magnetoresistive memory device assemblies
18 7,038,265 Capacitor having tantalum oxynitride film and method for making same
19 7,038,263 Integrated circuits with rhodium-rich structures
20 7,038,259 Dual capacitor structure for imagers and method of formation
21 7,037,862 Dielectric layer forming method and devices formed therewith
22 7,037,860 Modified source/drain re-oxidation method and system
23 7,037,848 Methods of etching insulative materials, of forming electrical devices, and of forming capacitors
24 7,037,840 Methods of forming planarized surfaces over semiconductor substrates
25 7,037,829 Compound structure for reduced contact resistance
26 7,037,808 Method of forming semiconductor constructions
27 7,037,775 Applying epitaxial silicon in disposable spacer flow
28 7,037,771 CMOS imager with a self-aligned buried contact
29 7,037,764 Method of forming a contact in a pixel cell
30 7,037,756 Stacked microelectronic devices and methods of fabricating same
31 7,037,751 Fabrication of stacked microelectronic devices
32 7,037,730 Capacitor with high dielectric constant materials and method of making
33 7,037,179 Methods and apparatuses for making and using planarizing pads for mechanical and chemical-mechanical planarization of microelectronic substrates
34 7,037,178 Methods for conditioning surfaces of polishing pads after chemical-mechanical polishing
35 7,037,177 Method and apparatus for conditioning a chemical-mechanical polishing pad
36 7,037,176 Through-in grinding method and through-in grinding apparatus