16 US patents granted on 09 February 2010 and assigned to Micron
| 1 | 7,660,708 | S-matrix technique for circuit simulation |
| 2 | 7,660,187 | Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM |
| 3 | 7,660,172 | Method and apparatus for synchronizing data from memory arrays |
| 4 | 7,660,158 | Programming method to reduce gate coupling interference for non-volatile memory |
| 5 | 7,660,144 | High-performance one-transistor memory cell |
| 6 | 7,659,630 | Interconnect structures with interlayer dielectric |
| 7 | 7,659,612 | Semiconductor components having encapsulated through wire interconnects (TWI) |
| 8 | 7,659,560 | Transistor structures |
| 9 | 7,659,211 | Method and apparatus for fabricating a memory device with a dielectric etch stop layer |
| 10 | 7,659,210 | Nano-crystal etch process |
| 11 | 7,659,208 | Method for forming high density patterns |
| 12 | 7,659,205 | Amorphous carbon-based non-volatile memory |
| 13 | 7,659,181 | Sub-micron space liner and filler process |
| 14 | 7,659,161 | Methods of forming storage nodes for a DRAM array |
| 15 | 7,659,152 | Localized biasing for silicon on insulator structures |
| 16 | 7,659,151 | Flip chip with interposer, and methods of making same |
