24 US patents granted on 16 January 2007 and assigned to Micron
1 | 7,165,185 | DDR II write data capture calibration |
2 | 7,165,143 | System and method for manipulating cache data |
3 | 7,165,004 | Dynamically adaptable semiconductor parametric testing |
4 | 7,164,611 | Data retention kill function |
5 | 7,164,607 | Dual bus memory burst architecture |
6 | 7,164,597 | Computer systems |
7 | 7,164,595 | Device and method for using dynamic cell plate sensing in a DRAM memory cell |
8 | 7,164,294 | Method for forming programmable logic arrays using vertical gate transistors |
9 | 7,164,260 | Bandgap reference circuit with a shared resistive network |
10 | 7,164,188 | Buried conductor patterns formed by surface transformation of empty spaces in solid state materials |
11 | 7,164,182 | Pixel with strained silicon layer for improving carrier mobility and blue response in imagers |
12 | 7,164,168 | Non-planar flash memory having shielding between floating gates |
13 | 7,164,165 | MIS capacitor |
14 | 7,164,161 | Method of formation of dual gate structure for imagers |
15 | 7,164,156 | Electronic systems using optical waveguide interconnects formed throught a semiconductor wafer |
16 | 7,163,893 | Advanced barrier liner formation for vias |
17 | 7,163,845 | Internal package heat dissipator |
18 | 7,163,837 | Method of forming a resistance variable memory element |
19 | 7,163,641 | Method of forming high aspect ratio apertures |
20 | 7,163,447 | Apparatus and method for conditioning a contact surface of a processing pad used in processing microelectronic workpieces |
21 | 7,163,439 | Methods and systems for conditioning planarizing pads used in planarizing substrates |
22 | 7,163,019 | Method of reducing water spotting and oxide growth on a semiconductor structure |
23 | 7,163,017 | Polysilicon etch useful during the manufacture of a semiconductor device |
24 | 7,162,796 | Method of making an interposer with contact structures |