Micron patents granted on 16 May 2006

30 US patents granted on 16 May 2006 and assigned to Micron

1 7,047,455 Memory with element redundancy
2 7,047,351 Memory hub bypass circuit and method
3 7,047,265 System and method for a single-pass multiple tap filter
4 7,046,578 Method and apparatus for memory device wordline
5 7,046,562 Integrated circuit reset circuitry
6 7,046,560 Reduction of fusible links and associated circuitry on memory dies
7 7,046,557 Flash memory
8 7,046,547 Magnetic non-volatile memory coil layout architecture and process integration scheme
9 7,046,538 Memory stacking system and method
10 7,046,537 Reduced signal swing in bit lines in a CAM
11 7,046,536 Programable identification circuitry
12 7,046,340 Method and apparatus for controlling radiation beam intensity directed to microlithographic substrates
13 7,046,339 Optimized optical lithography illumination source for use during the manufacture of a semiconductor device
14 7,046,038 Upward and downward pulse stretcher circuits and modules
15 7,046,029 Conductive material for integrated circuit fabrication
16 7,045,889 Device for establishing non-permanent electrical connection between an integrated circuit device lead element and a substrate
17 7,045,880 Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction
18 7,045,874 Micromechanical strained semiconductor by wafer bonding
19 7,045,844 Memory cell and method for forming the same
20 7,045,834 Memory cell arrays
21 7,045,454 Chemical mechanical planarization of conductive material
22 7,045,449 Methods of forming semiconductor constructions
23 7,045,439 Methods of forming semiconductor constructions
24 7,045,430 Atomic layer-deposited LaAlO3 films for gate dielectrics
25 7,045,405 Semiconductor processing methods of forming integrated circuitry
26 7,045,277 Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride
27 7,045,017 Method for post chemical-mechanical planarization cleaning of semiconductor wafers
28 7,044,997 Process byproduct trap, methods of use, and system including same
29 7,043,831 Method for fabricating a test interconnect for bumped semiconductor components by forming recesses and cantilevered leads on a substrate
30 7,043,830 Method of forming conductive bumps