Micron patents granted on 17 April 2007

30 US patents granted on 17 April 2007 and assigned to Micron

1 7,206,956 Duty cycle distortion compensation for the data output of a memory device
2 7,206,909 Host memory interface for a parallel processor
3 7,206,887 System and method for memory hub-based expansion bus
4 7,206,800 Overflow detection and clamping with parallel operand processing for fixed-point multipliers
5 7,206,447 Image sensing system with histogram modification
6 7,206,243 Method of rewriting a logic state of a memory cell
7 7,206,240 Fast sensing scheme for floating-gate memory cells
8 7,206,234 Input buffer for low voltage operation
9 7,206,215 Antifuse having tantalum oxynitride film and method for making same
10 7,205,996 Full-scene anti-aliasing method and system
11 7,205,661 Projected contact structures for engaging bumped semiconductor devices and methods of making the same
12 7,205,656 Stacked device package for peripheral and center device pad layout device
13 7,205,654 Programmed material consolidation methods for fabricating heat sinks
14 7,205,633 Capacitor layout orientation
15 7,205,620 Highly reliable amorphous high-k gate dielectric ZrO.sub.xN.sub.y
16 7,205,606 DRAM access transistor
17 7,205,600 Capacitor constructions with a barrier layer to threshold voltage shift inducing material
18 7,205,599 Devices having improved capacitance
19 7,205,598 Random access memory device utilizing a vertically oriented select transistor
20 7,205,584 Image sensor for reduced dark current
21 7,205,526 Methods of fabricating layered lens structures
22 7,205,248 Method of eliminating residual carbon from flowable oxide fill
23 7,205,245 Method of forming trench isolation within a semiconductor substrate
24 7,205,229 Interconnect alloys and methods and apparatus using same
25 7,205,227 Methods of forming CMOS constructions
26 7,205,223 Method of forming an interconnect structure for a semiconductor device
27 7,205,221 Under bump metallization pad and solder bump connections
28 7,205,218 Method including forming gate dielectrics having multiple lanthanide oxide layers
29 7,204,889 Method of reducing water spotting and oxide growth on a semiconductor structure
30 7,204,885 Deposition system to provide preheating of chemical vapor deposition precursors