28 US patents granted on 21 August 2007 and assigned to Micron
| 1 | 7,260,685 | Memory hub and access method having internal prefetch buffers |
| 2 | 7,260,125 | Method of forming mirrors by surface transformation of empty spaces in solid state materials |
| 3 | 7,260,015 | Memory device and method having multiple internal data buses and memory bank interleaving |
| 4 | 7,259,996 | Flash memory |
| 5 | 7,259,991 | Operation of multiple select gate architecture |
| 6 | 7,259,915 | Microlens array sheet |
| 7 | 7,259,608 | System and method for open-loop synthesis of output clock signals having a selected phase relative to an input clock signal |
| 8 | 7,259,604 | Initialization scheme for a reduced-frequency, fifty percent duty cycle corrector |
| 9 | 7,259,601 | Apparatus and method for suppressing jitter within a clock signal generator |
| 10 | 7,259,581 | Method for testing semiconductor components |
| 11 | 7,259,578 | System for testing semiconductor components having interconnect with variable flexure contacts |
| 12 | 7,259,464 | Vertical twist scheme for high-density DRAMs |
| 13 | 7,259,451 | Invertible microfeature device packages |
| 14 | 7,259,450 | Double-packaged multi-chip semiconductor module |
| 15 | 7,259,442 | Selectively doped trench device isolation |
| 16 | 7,259,435 | Intermediate semiconductor device having nitrogen concentration profile |
| 17 | 7,259,434 | Highly reliable amorphous high-k gate oxide ZrO2 |
| 18 | 7,259,415 | Long retention time single transistor vertical memory gain cell |
| 19 | 7,259,413 | High dynamic range image sensor |
| 20 | 7,259,093 | Methods of forming a conductive contact through a dielectric |
| 21 | 7,259,079 | Methods for filling high aspect ratio trenches in semiconductor layers |
| 22 | 7,259,066 | One-transistor composite-gate memory |
| 23 | 7,259,064 | Forming integrated circuit devices |
| 24 | 7,258,954 | Method to recover the exposure sensitivity of chemically amplified resins from post coat delay effect |
| 25 | 7,258,895 | Methods of forming material on a substrate, and a method of forming a field effect transistor gate oxide on a substrate |
| 26 | 7,258,892 | Methods and systems for controlling temperature during microfeature workpiece processing, e.g., CVD deposition |
| 27 | 7,258,596 | Systems and methods for monitoring characteristics of a polishing pad used in polishing micro-device workpieces |
| 28 | 7,257,884 | Method for fabricating semiconductor component with adjustment circuitry for electrical characteristics or input/output configuration |
