25 US patents granted on 21 March 2006 and assigned to Micron
| 1 | 7,017,022 | Processing memory requests in a pipelined memory controller |
| 2 | 7,016,451 | Method and apparatus for generating a phase dependent control signal |
| 3 | 7,016,254 | Synchronous flash memory with virtual segment architecture |
| 4 | 7,016,252 | High speed low voltage driver |
| 5 | 7,016,250 | Voltage regulator and data path for a memory device |
| 6 | 7,016,210 | Longest match detection in a CAM |
| 7 | 7,015,844 | Minimized SAR-type column-wide ADC for image sensors |
| 8 | 7,015,559 | Method and system for electrically coupling a chip to chip package |
| 9 | 7,015,533 | Capacitor constructions, semiconductor constructions, and methods of forming electrical contacts and semiconductor constructions |
| 10 | 7,015,532 | Capacitor compatible with high dielectric constant materials having a low contact resistance layer and the method for forming same |
| 11 | 7,015,530 | Electronic systems comprising memory devices |
| 12 | 7,015,529 | Localized masking for semiconductor structure development |
| 13 | 7,015,528 | Reduced aspect ratio digit line contact process flow used during the formation of a semiconductor device |
| 14 | 7,015,527 | Metal oxynitride capacitor barrier layer |
| 15 | 7,015,525 | Folded bit line DRAM with vertical ultra thin body transistors |
| 16 | 7,015,494 | Assemblies displaying differential negative resistance |
| 17 | 7,015,448 | Dark current reduction circuitry for CMOS active pixel sensors |
| 18 | 7,015,151 | Transistor fabrication methods comprising selective wet oxidation |
| 19 | 7,015,113 | Methods of forming trench isolation regions |
| 20 | 7,015,111 | Use of selective oxidation to form asymmetrical oxide features during the manufacture of a semiconductor device |
| 21 | 7,015,098 | Methods and structure for an improved floating gate memory cell |
| 22 | 7,015,063 | Methods of utilizing a back to back semiconductor device module |
| 23 | 7,014,537 | Method of processing a semiconductor substrate |
| 24 | 7,014,535 | Carrier head having low-friction coating and planarizing machine using same |
| 25 | 7,013,559 | Method of fabricating a semiconductor device package |
