Micron patents granted on 24 April 2007

32 US patents granted on 24 April 2007 and assigned to Micron

1 7,210,110 Method for determining a matched routing arrangement for semiconductor devices
2 7,210,059 System and method for on-board diagnostics of memory modules
3 7,210,020 Continuous interleave burst access
4 7,209,794 Controller with interface attachment
5 7,209,405 Memory device and method having multiple internal data buses and memory bank interleaving
6 7,209,403 Enhanced fuse configurations for low-voltage flash memories
7 7,209,387 Non-volatile programmable fuse apparatus in a flash memory with pairs of supercells programmed in a complementary fashion
8 7,209,378 Columnar 1T-N memory cell structure
9 7,209,359 Universal memory module/PCB storage, transport, automation handling tray
10 7,209,173 Methods of operating photodiode-type pixel and imager device
11 7,209,168 Defective pixel correction method and system
12 7,209,166 Wide dynamic range operation for CMOS sensor with freeze-frame shutter
13 7,208,989 Synchronous clock generator including duty cycle correction
14 7,208,986 Measure-controlled delay circuits with reduced phase error
15 7,208,959 Methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
16 7,208,935 Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
17 7,208,839 Semiconductor component assemblies having interconnects
18 7,208,836 Integrated circuitry and a semiconductor processing method of forming a series of conductive lines
19 7,208,828 Semiconductor package with wire bonded stacked dice and multi-layer metal bumps
20 7,208,813 Capacitor layout orientation
21 7,208,805 Structures comprising a layer free of nitrogen between silicon nitride and photoresist
22 7,208,804 Crystalline or amorphous medium-K gate oxides, Y.sub.20.sub.3 and Gd.sub.20.sub.3
23 7,208,793 Scalable integrated logic and non-volatile memory
24 7,208,783 Optical enhancement of integrated circuit photodetectors
25 7,208,758 Dynamic integrated circuit clusters, modules including same and methods of fabricating
26 7,208,412 Method of forming metal oxide and semimetal oxide
27 7,208,410 Methods relating to forming interconnects
28 7,208,407 Flash memory cells with reduced distances between cell elements
29 7,208,368 Methods of forming spaced conductive regions, and methods of forming capacitor constructions
30 7,208,335 Castellated chip-scale packages and methods for fabricating the same
31 7,208,323 Method for forming magneto-resistive memory cells with shape anisotropy
32 7,208,198 Chemical vapor deposition methods of forming barium strontium titanate comprising dielectric layers, including such layers having a varied concentration of barium and strontium within the layer