Micron patents granted on 26 June 2007

38 US patents granted on 26 June 2007 and assigned to Micron

1 7,237,172 Error detection and correction in a CAM
2 7,237,158 Intelligent binning for electrically repairable semiconductor chips
3 7,237,155 Testing method for permanent electrical removal of an intergrated circuit output after packaging
4 7,237,136 Method and apparatus for providing symmetrical output data for a double data rate DRAM
5 7,236,415 Sample and hold memory sense amplifier
6 7,236,407 Flash memory architecture for optimizing performance of memory having multi-level memory cells
7 7,236,400 Erase verify for non-volatile memory using a bitline current-to-voltage converter
8 7,236,399 Method for erase-verifying a non-volatile memory capable of identifying over-erased and under-erased memory cells
9 7,236,387 Writing to ferroelectric memory devices
10 7,236,385 Memory architecture
11 7,236,019 Low current wide VREF range input buffer
12 7,236,016 Low voltage comparator
13 7,235,872 Bow control in an electronic package
14 7,235,871 Stacked microelectronic dies
15 7,235,865 Methods for making nearly planar dielectric films in integrated circuits
16 7,235,858 Edge intensive antifuse and method for making the same
17 7,235,856 Trench isolation for semiconductor devices
18 7,235,854 Lanthanide doped TiO.sub.x dielectric films
19 7,235,837 Technique to control tunneling currents in DRAM capacitors, cells, and devices
20 7,235,501 Lanthanum hafnium oxide dielectrics
21 7,235,499 Semiconductor processing methods
22 7,235,498 Process for growing a dielectric layer on a silicon-containing surface using a mixture of N.sub.2O and O.sub.3
23 7,235,497 Selective oxidation methods and transistor fabrication methods
24 7,235,494 CMP cleaning composition with microbial inhibitor
25 7,235,493 Low-k dielectric process for multilevel interconnection using mircocavity engineering during electric circuit manufacture
26 7,235,488 In-situ chemical-mechanical planarization pad metrology using ultrasonic imaging
27 7,235,480 Semiconductor processing methods of forming integrated circuitry and semiconductor processing methods of forming dynamic random access memory (DRAM) circuitry
28 7,235,468 FinFET device with reduced DIBL
29 7,235,459 Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry
30 7,235,457 High permeability layered films to reduce noise in high speed interconnects
31 7,235,448 Dielectric layer forming method and devices formed therewith
32 7,235,446 Methods of forming silicon-doped aluminum oxide, and methods of forming transistors and memory devices
33 7,235,431 Methods for packaging a plurality of semiconductor dice using a flowable dielectric material
34 7,235,419 Method of making a memory cell
35 7,235,409 Methods of forming semiconductor constructions
36 7,235,138 Microfeature workpiece processing apparatus and methods for batch deposition of materials on microfeature workpieces
37 7,235,000 Methods and systems for conditioning planarizing pads used in planarizing substrates
38 7,234,412 Semiconductor substrate deposition processor chamber liner apparatus