36 US patents granted on 28 August 2007 and assigned to Micron
1 | 7,263,570 | Method of providing an interface to a plurality of peripheral devices using bus adapter chips |
2 | 7,263,543 | Method for manipulating data in a group of processing elements to transpose the data using a memory stack |
3 | 7,263,022 | No-precharge FAMOS cell and latch circuit in a memory device |
4 | 7,263,017 | AC sensing for a resistive memory |
5 | 7,263,006 | Memory block erasing in a flash memory device |
6 | 7,262,996 | Programmable soft-start control for charge pump |
7 | 7,262,780 | Simple and robust color saturation adjustment for digital images |
8 | 7,262,641 | Current differential buffer |
9 | 7,262,637 | Output buffer and method having a supply voltage insensitive slew rate |
10 | 7,262,612 | Methods for evaluating characteristics of a plasma or the effects of a plasma on a substrate |
11 | 7,262,555 | Method and system for discretely controllable plasma processing |
12 | 7,262,506 | Stacked mass storage flash memory package |
13 | 7,262,505 | Selective electroless-plated copper metallization |
14 | 7,262,503 | Semiconductor constructions |
15 | 7,262,499 | Semiconductor packages |
16 | 7,262,488 | Substrate with enhanced properties for planarization |
17 | 7,262,487 | Semiconductor devices and other electronic components including porous insulators created from “void” creating materials |
18 | 7,262,482 | Open pattern inductor |
19 | 7,262,473 | Metal to polysilicon contact in oxygen environment |
20 | 7,262,428 | Strained Si/SiGe/SOI islands and processes of making same |
21 | 7,262,405 | Prefabricated housings for microelectronic imagers |
22 | 7,262,136 | Modified facet etch to prevent blown gate oxide and increase etch chamber life |
23 | 7,262,135 | Methods of forming layers |
24 | 7,262,134 | Microfeature workpieces and methods for forming interconnects in microfeature workpieces |
25 | 7,262,132 | Metal plating using seed film |
26 | 7,262,130 | Methods for making integrated-circuit wiring from copper, silver, gold, and other metals |
27 | 7,262,123 | Methods of forming wire bonds for semiconductor constructions |
28 | 7,262,121 | Integrated circuit and methods of redistributing bondpad locations |
29 | 7,262,110 | Trench isolation structure and method of formation |
30 | 7,262,102 | Reduction of field edge thinning in peripheral devices |
31 | 7,262,099 | Methods of forming field effect transistors |
32 | 7,262,089 | Methods of forming semiconductor structures |
33 | 7,262,074 | Methods of fabricating underfilled, encapsulated semiconductor die assemblies |
34 | 7,262,053 | Terraced film stack |
35 | 7,261,835 | Acid blend for removing etch residue |
36 | 7,261,832 | Methods and apparatuses for monitoring and controlling mechanical or chemical-mechanical planarization of microelectronic substrate assemblies |