28 US patents granted on 30 January 2007 and assigned to Micron
| 1 | 7,171,642 | Method and system for creating a netlist allowing current measurement through a sub-circuit |
| 2 | 7,171,508 | Dual port memory with asymmetric inputs and outputs, device, system and method |
| 3 | 7,170,867 | Radio frequency data communications device |
| 4 | 7,170,806 | Data path having grounded precharge operation and test compression capability |
| 5 | 7,170,783 | Layout for NAND flash memory array having reduced word line impedance |
| 6 | 7,170,361 | Method and apparatus of interposing voltage reference traces between signal traces in semiconductor devices |
| 7 | 7,170,304 | Selectively configurable probe structures, e.g., selectively configurable probe cards for testing microelectronic components |
| 8 | 7,170,184 | Treatment of a ground semiconductor die to improve adhesive bonding to a substrate |
| 9 | 7,170,174 | Contact structure and contact liner process |
| 10 | 7,170,171 | Support ring for use with a contact pad and semiconductor device components including the same |
| 11 | 7,170,161 | In-process semiconductor packages with leadframe grid arrays |
| 12 | 7,170,139 | Semiconductor constructions |
| 13 | 7,170,124 | Trench buried bit line memory devices and methods thereof |
| 14 | 7,170,123 | Antiferromagnetically stabilized pseudo spin valve for memory applications |
| 15 | 7,170,117 | Image sensor with improved dynamic range and method of formation |
| 16 | 7,170,103 | Wafer with vertical diode structures |
| 17 | 7,170,091 | Probe look ahead: testing parts not currently under a probehead |
| 18 | 7,169,693 | Collar positionable about a periphery of a contact pad and around a conductive structure secured to the contact pads, semiconductor device components including same, and methods for fabricating same |
| 19 | 7,169,691 | Method of fabricating wafer-level packaging with sidewall passivation and related apparatus |
| 20 | 7,169,685 | Wafer back side coating to balance stress from passivation layer on front of wafer and be used as die attach adhesive |
| 21 | 7,169,673 | Atomic layer deposited nanolaminates of HfO.sub.2/ZrO.sub.2 films as gate dielectrics |
| 22 | 7,169,666 | Method of forming a device having a gate with a selected electron affinity |
| 23 | 7,169,662 | Methods for making semiconductor structures having high-speed areas and high-density areas |
| 24 | 7,169,645 | Methods of fabrication of package assemblies for optically interactive electronic devices |
| 25 | 7,169,545 | Resist exposure system and method of forming a pattern on a resist |
| 26 | 7,169,248 | Methods for releasably attaching support members to microfeature workpieces and microfeature assemblies formed using such methods |
| 27 | 7,169,014 | Apparatuses for controlling the temperature of polishing pads used in planarizing micro-device workpieces |
| 28 | 7,168,163 | Full wafer silicon probe card for burn-in and testing and test system including same |
