31 US patents granted on 31 October 2006 and assigned to Micron
| 1 | 7,130,979 | Dynamic volume management |
| 2 | 7,130,239 | Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure |
| 3 | 7,130,228 | Active termination control through module register |
| 4 | 7,130,227 | Adjustable timing circuit of an integrated circuit |
| 5 | 7,130,226 | Clock generating circuit with multiple modes of operation |
| 6 | 7,130,220 | Write once read only memory employing floating gates |
| 7 | 7,130,216 | One-device non-volatile random access memory cell |
| 8 | 7,130,022 | Methods and systems for controlling radiation beam characteristics for microlithographic processing |
| 9 | 7,129,930 | Cordless computer keyboard with illuminated keys |
| 10 | 7,129,794 | Phase detector for reducing noise |
| 11 | 7,129,761 | Digital delay-locked loop circuits with hierarchical delay adjustment |
| 12 | 7,129,738 | Method and apparatus for calibrating driver impedance |
| 13 | 7,129,725 | Semiconductor test interconnect with variable flexure contacts having polymer material |
| 14 | 7,129,724 | Plasma probe |
| 15 | 7,129,631 | Black matrix for flat panel field emission displays |
| 16 | 7,129,584 | Elimination of RDL using tape base flip chip on flex for die stacking |
| 17 | 7,129,573 | System having semiconductor component with encapsulated, bonded, interconnect contacts |
| 18 | 7,129,567 | Substrate, semiconductor die, multichip module, and system including a via structure comprising a plurality of conductive elements |
| 19 | 7,129,553 | Lanthanide oxide/hafnium oxide dielectrics |
| 20 | 7,129,535 | Capacitor constructions |
| 21 | 7,129,534 | Magneto-resistive memory and method of manufacturing the same |
| 22 | 7,129,457 | Redundant imaging systems |
| 23 | 7,129,188 | Transistor fabrication methods |
| 24 | 7,129,180 | Masking structure having multiple layers including an amorphous carbon layer |
| 25 | 7,129,160 | Method for simultaneously removing multiple conductive materials from microelectronic substrates |
| 26 | 7,129,156 | Method for fabricating a silicon carbide interconnect for semiconductor components using heating |
| 27 | 7,129,128 | Method of improved high K dielectric-polysilicon interface for CMOS devices |
| 28 | 7,129,114 | Methods relating to singulating semiconductor wafers and wafer scale assemblies |
| 29 | 7,128,842 | Polyimide as a mask in vapor hydrogen fluoride etching |
| 30 | 7,128,787 | Atomic layer deposition method |
| 31 | 7,128,551 | Surface smoothing of stereolithographically formed 3-D objects |
